TDA7437N_06 Datasheet, PDF (15/34 Pages) STMicroelectronics – Digitally controlled audio processor

TDA7437N
4
Software specification
Software specification
4.1
Interface protocol
The interface protocol comprises of:
● A start condition (s)
● A chip address byte, (the LSB bit determines read (=1)/write (=0) transmission)
● A subaddress byte.
● A sequence of data (N-bytes + acknowledge)
● A stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB
MSB
LSB
MSB
S 1 0 0 0 1 0 A R/W ACK X X X I A3 A2 A1 A0 ACK
DATA
ACK = Acknowledge; S = Start; P = Stop; I = Auto increment; X = Not used
Max clock speed 500kbits/s
ADDRpin open A = 0
ADDRpin close to Vs A = 1
LSB
ACK P
4.2
Auto increment
If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled.
4.3
Subaddress (receive mode)
Table 5.
MSB
X
Subaddress (receive mode)
X
X
I
A3
A2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
LSB
FUNCTION
A1
A0
0
0 Input selector
0
1 Loudness
1
0 Volume
1
1 Bass, Treble
0
0 Speaker attenuator LF
0
1 Speaker attenuator LR
1
0 Speaker attenuator RF
1
1 Speaker Attenuator RR
0
0 Input gain middle
0
1 Mute
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