English
Language : 

ST92F120 Datasheet, PDF (14/320 Pages) STMicroelectronics – 8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD
ST92F120 - GENERAL DESCRIPTION
In Figure 6 a true open-drain pin schematic is
shown. In this case all paths to VDD are removed
(P-channel driver, ESD protection diode, internal
weak pull-up) in order to allow the system to turn
off the power supply of the microcontroller and
keep the voltage level at the pin high without in-
jecting current in the device. This is a typical con-
dition which can occur when several devices inter-
face a serial bus: if one device is not involved in
the communication, it can be disabled by turning
off its power supply to reduce the system current
consumption.
When an illegal negative voltage level is applied to
the ST9 I/O pins (both versions, push-pull and true
open-drain output) the clamp diode is always
present and active (see ESD protection circuitry
and N-channel driver).
1.2.4.4 Internal Circuitry: Analog Input pin
Figure 6 shows the internal circuitry used for ana-
log input. It is substantially a digital I/O with an
added analog multiplexer for the A/D Converter in-
put signal selection.
The presence of the multiplexer P-channel and N-
channel can affect the behaviour of the pin when
exposed to illegal voltage conditions. These tran-
sistors are controlled by a low noise logic, biased
through AVDD and AVSS including P-channel N-
well: it is important to always verify the input volt-
age value with respect to both analog power sup-
ply and digital power supply, in order to avoid un-
intended current injections which (if not limited)
could destroy the device.
Figure 6. Digital Input/Output - Push-Pull Output - Analog Multiplexer Input
I/OCIRCUITRY
P
PIN
OUTPUT
BUFFER
N
ESD PROTECTION
CIRCUITRY
EN
P
P
P
INPUT
N BUFFER
EN
N
AVDD
P
PORTCIRCUITRY
14/320
9