EVALST7590-1 Datasheet, PDF (14/24 Pages) STMicroelectronics – Narrow-band OFDM power line networking PRIME compliant system-on-chip

Analog front end (AFE)
4
Analog front end (AFE)
ST7590
4.1
Reception path
Figure 5 shows the block diagram of the ST7590 input receiving path. The reception AFE
main blocks are a wide input range analog PGA (programmable gain amplifier) and the ADC
(analog to digital converter).
Figure 5. Reception path block diagram
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The PGA is controlled by a loop algorithm that detects the amplifier output signal amplitude
and adapts the gain of the amplifier in order to have the optimum input voltage range for the
ADC. The PGA gain ranges from -18 dB up to 30 dB (typical), with steps of 6 dB (typical), as
described in Table 5.
Table 5. PGA gain table
PGA code
PGA gain (typical)
[dB]
0
-18
1
-12
2
-6
3
0
4
6
5
12
6
18
7
24
8
30
RX_IN max range
[V p-p]
16
8
4
2
1
0.500
0.250
0.125
0.0625
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Doc ID 18349 Rev 1