STBP120 Datasheet, PDF (12/36 Pages) STMicroelectronics – Overvoltage protection device with thermal shutdown

Application information
4
Application information
STBP120
4.1
Calculating the power dissipation
The maximum power dissipation of the STBP120 internal power MOSFET can be calculated
using following formula:
P_D = I² x R_DS(on)(max),
Where I is current flowing through the MOSFET and R_DS(on)(max) is maximum value of
MOSFET resistance.
Example:
R_load = 5 Ω, V_IN = 5 V, R_DS(on)(max) = 150 mΩ
I = V_IN / (R_DS(on)(max) + R_load) = 5 / (5 + 0.150) = 0.97 A
P_D = 0.97² x 0.15 = 0.14 W
The power dissipation of reverse diode (in powering peripherals mode) can be estimated as
P_D = (V_OUT - V_IN) x I ≈ 0.7 x I.
4.2
Calculating the junction temperature
The maximum junction temperature for given power dissipation, ambient temperature and
thermal resistance junction - to - ambient can be calculated as
T_J = T_A + 1.15 x P_D x R_thJA = T_A + 1.15 x I² x R_DS(on)(max) x R_thJA,
where T_J is junction temperature, T_A is given ambient temperature, 1.15 is a derating factor
and R_thJA is thermal resistance junction - to - ambient, depending on shape, dimension and
design of PCB. Two examples of PCB with appropriate thermal resistance are listed in
Table 3. The junction temperature may not exceed 125 °C (see Table 4), due to T_OFF
(thermal shutdown threshold temperature).
Maximum allowed MOSFET current for ambient temperature T_A = 85 °C and various R_thJA
values are listed in Figure 5.
Example: For conditions listed in previous example, well designed PCB (R_thJA = 82 °C/W)
and T_A = 85 °C, the maximum junction temperature is
85 + 1.15 x 0.14 x 82 = 98.2 °C.
4.3
12/36
PCB layout recommendations
● This device is intended as a protection device to the application from overvoltage.
It must be ensured that the clearances between PCB tracks satisfy the high voltage
design rules.
● Input capacitor, C1, should be located as close as possible to the STBP120 device.
It should be a Low-ESR ceramic capacitor. Also the protective resistors R_FLT, R_EN
(if used) should be located close to the STBP120.
● For good thermal performance, it is recommended to connect the STBP120 exposed
thermal pads with the PCB ground plane. In most designs, this requires thermal vias
between the copper pads on PCB and the ground plane.
Doc ID 15492 Rev 4