ST10F273Z4 Datasheet, PDF (118/188 Pages) STMicroelectronics – 16-bit MCU with 512 Kbyte Flash memory and 36 Kbyte RAM

Register set
ST10F273Z4
Table 54. List of special function registers (continued)
Name
Physical
address
8-bit
address
Description
XPERCON b F024h
E
ZEROS b FF1Ch
12h XPER configuration register
8Eh Constant value 0’s register (read only)
Reset
value
- - 05h
0000h
Note:
1. The system configuration is selected during reset. SYSCON reset value is 0000 0xx0
x000 0000b.
2. Reset Value depends on different triggered reset event.
3. The XPnIC Interrupt Control Registers control interrupt requests from integrated X-Bus
peripherals. Some software controlled interrupt requests may be generated by setting the
XPnIR bits (of XPnIC register) of the unused X-Peripheral nodes.
23.2
X-registers
The following table lists all X-Bus registers which are implemented in the ST10F273Z4
ordered by their name. The FLASH control registers are listed in a separate section, in spite
of they also are physically mapped on X-Bus memory space. Note that all X-Registers are
not bit-addressable.
Table 55. List of XBus registers
Name
Physical
address
Description
CAN1BRPER
CAN1BTR
CAN1CR
CAN1EC
CAN1IF1A1
CAN1IF1A2
CAN1IF1CM
CAN1IF1CR
CAN1IF1DA1
CAN1IF1DA2
CAN1IF1DB1
CAN1IF1DB2
CAN1IF1M1
CAN1IF1M2
CAN1IF1MC
CAN1IF2A1
CAN1IF2A2
CAN1IF2CM
EF0Ch
EF06h
EF00h
EF04h
EF18h
EF1Ah
EF12h
EF10h
EF1Eh
EF20h
EF22h
EF24h
EF14h
EF16h
EF1Ch
EF48h
EF4Ah
EF42h
CAN1: BRP extension register
CAN1: Bit timing register
CAN1: CAN control register
CAN1: error counter
CAN1: IF1 arbitration 1
CAN1: IF1 arbitration 2
CAN1: IF1 command mask
CAN1: IF1 command request
CAN1: IF1 data A 1
CAN1: IF1 data A 2
CAN1: IF1 data B 1
CAN1: IF1 data B 2
CAN1: IF1 mask 1
CAN1: IF1 mask 2
CAN1: IF1 message control
CAN1: IF2 arbitration 1
CAN1: IF2 arbitration 2
CAN1: IF2 command mask
Reset value
0000h
2301h
0001h
0000h
0000h
0000h
0000h
0001h
0000h
0000h
0000h
0000h
FFFFh
FFFFh
0000h
0000h
0000h
0000h
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