STM32L062K8 Datasheet, PDF (117/118 Pages) STMicroelectronics – Ultra-low-power platform

STM32L062x8
Revision history
Date
11-Mar-2016
09-Jun-2016
07-Mar-2017
Table 80. Document revision history (continued)
Revision
Changes
Updated number of SPIs on cover page and in Table 1: Ultra-low-power
STM32L062x8 device features and peripheral counts.
Changed minimum comparator supply voltage to 1.65 V on cover page.
Added number of fast and standard channels in Section 3.11: Analog-
to-digital converter (ADC).
Updated Section 3.19.2: Universal synchronous/asynchronous receiver
transmitter (USART) and Section 3.19.4: Serial peripheral interface
(SPI)/Inter-integrated sound (I2S) to mention the fact that USARTs with
synchronous mode feature can be used as SPI master interfaces.
Added baudrate allowing to wake up the MCU from Stop mode in
Section 3.19.2: Universal synchronous/asynchronous receiver
6
transmitter (USART).
Section 6.3.15: 12-bit ADC characteristics:
– Table 55: ADC characteristics:
Distinction made between V_DDA for fast and standard channels;
added note 1.
Added note 4. related to R_ADC.
Updated t_S and t_CONV.
– Updated equation 1 description.
– Updated Table 56: RAIN max for fADC = 16 MHz for f_ADC = 16 MHz
and distinction made between fast and standard channels.
Updated R_O and added Note 1. in Table 58: DAC characteristics.
Added Table 65: USART/LPUART characteristics.
7
Added WLCSP36 package, STM32L062T8 part number and
corresponding features.
Added thin WLCSP36 package.
In Section 4: Pin descriptions, renamed USB_OE into USB_NOE.
Added mission profile compliance with JEDEC JESD47 in Section 6.2:
Absolute maximum ratings.
Added note 2. related to the position of the external capacitor below
Figure 22: Recommended NRST pin protection.
Updated R_L in Table 55: ADC characteristics.
Updated t_AF maximum value for range 1 in Table 64: I2C analog filter
characteristics.
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Updated t_WUUSART description in Table 65: USART/LPUART
characteristics.
NSS timing waveforms updated in Figure 28: SPI timing diagram -
slave mode and CPHA = 0 and Figure 29: SPI timing diagram - slave
mode and CPHA = 1(1).
Added reference to optional marking or inset/upset marks in all
package device marking sections.
Previous WLCSP36 package renamed “Standard” WLCSP36; added
Note 2. below Figure 32: Standard WLCSP36 - 2.61 x 2.88 mm,
0.4 mm pitch wafer level chip scale package outline and updated
Table 72: Standard WLCSP36 - 2.61 x 2.88 mm, 0.4 mm pitch wafer
level chip scale mechanical data.
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