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SI8641BD-B-IS Datasheet, PDF (11/44 Pages) STMicroelectronics – LOW-POWER QUAD-CHANNEL DIGITAL ISOLATOR
Si8640/41/42/45
Table 3. Electrical Characteristics (Continued)
(VDD1 = 3.3 V ±10%, VDD2 = 3.3 V ±10%, TA = –40 to 125 °C)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
Timing Characteristics
Si864xBx, Ex
Maximum Data Rate
0
—
150 Mbps
Minimum Pulse Width
—
—
5.0
ns
Propagation Delay
Pulse Width Distortion
|tPLH – tPHL|
Propagation Delay Skew2
Channel-Channel Skew
All Models
tPHL, tPLH
PWD
tPSK(P-P)
tPSK
See Figure 2
See Figure 2
5.0
8.0
13
ns
—
0.2
4.5
ns
—
2.0
4.5
ns
—
0.4
2.5
ns
Output Rise Time
tr
CL = 15 pF
See Figure 2
—
2.5
4.0
ns
Output Fall Time
tf
CL = 15 pF
See Figure 2
—
2.5
4.0
ns
Peak eye diagram jitter
tJIT(PK)
See Figure 8
—
Common Mode Transient
CMTI
VI = VDD or 0 V
35
Immunity
VCM = 1500 V (see
Figure 3)
350
—
ps
50
— kV/µs
Enable to Data Valid
ten1
See Figure 1
—
6.0
11
ns
Enable to Data Tri-State
Startup Time3
ten2
See Figure 1
tSU
—
8.0
12
ns
—
15
40
µs
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.6
11