E-L6202 Datasheet, PDF (11/20 Pages) STMicroelectronics – DMOS FULL BRIDGE DRIVER

Boostrap Capacitors
To ensure that the POWER DMOS transistors are
driven correctly gate to source voltage of typ. 10
V must be guaranteed for all of the N-channel
DMOS transistors. This is easy to be provided for
the lower POWER DMOS transistors as their
sources are refered to ground but a gate voltage
greater than the supply voltage is necessary to
drive the upper transistors. This is achieved by an
internal charge pump circuit that guarantees cor-
rect DC drive in combination with the boostrap cir-
cuit. For efficient charging the value of the boos-
trap capacitor should be greater than the input
capacitance of the power transistor which is
around 1 nF. It is recommended that a capaci-
tance of at least 10 nF is used for the bootstrap. If
a smaller capacitor is used there is a risk that the
POWER transistors will not be fully turned on and
they will show a higher RDS (ON). On the other
hand if a elevated value is used it is possible that
a current spike may be produced in the sense re-
sistor.
Reference Voltage
To by-pass the internal Ref. Volt. circuit it is rec-
ommended that a capacitor be placed between its
pin and ground. A value of 0.22 µF should be suf-
ficient for most applications. This pin is also pro-
tected against a short circuit to ground: a max.
current of 2mA max. can be sinked out.
Dead Time
To protect the device against simultaneous con-
duction in both arms of the bridge resulting in a
rail to rail short circuit, the integrated logic control
provides a dead time greater than 40 ns.
Thermal Protection
A thermal protection circuit has been included
that will disable the device if the junction tempera-
ture reaches 150 °C. When the temperature has
fallen to a safe level the device restarts the input
and enable signals under control.
Figure 16.
L6201 - L6202 - L6203
APPLICATION INFORMATION
Recirculation
During recirculation with the ENABLE input high,
the voltage drop across the transistor is RDS
(ON)⋅ IL, clamped at a voltage depending on the
characteristics of the source-drain diode. Al-
though the device is protected against cross con-
duction, current spikes can appear on the current
sense pin due to charge/discharge phenomena in
the intrinsic source drain capacitances. In the ap-
plication this does not cause any problem be-
cause the voltage spike generated on the sense
resistor is masked by the current controller circuit.
Rise Time Tr (See Fig. 16)
When a diagonal of the bridge is turned on cur-
rent begins to flow in the inductive load until the
maximum current IL is reached after a time Tr.
The dissipated energy EOFF/ON is in this case :
EOFF/ON = [RDS (ON) ⋅ IL2 ⋅ Tr] ⋅ 2/3
Load Time TLD (See Fig.16)
During this time the energy dissipated is due to
the ON resistance of the transistors (ELD) and due
to commutation (ECOM). As two of the POWER
DMOS transistors are ON, EON is given by :
ELD = IL2 ⋅ RDS (ON) ⋅ 2 ⋅ TLD
In the commutation the energy dissipated is :
ECOM = VS ⋅ IL ⋅ TCOM ⋅ fSWITCH ⋅ TLD
Where :
TCOM = TTURN-ON = TTURN-OFF
fSWITCH = Chopping frequency.
Fall Time Tf (See Fig. 16)
It is assumed that the energy dissipated in this
part of the cycle takes the same form as that
shown for the rise time :
EON/OFF = [RDS (ON) ⋅ IL2 ⋅ Tf] ⋅ 2/3
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