M24C02-WMN6P Datasheet, PDF (10/38 Pages) STMicroelectronics – Enhanced ESD/latch-up protection, More than 40-year data retention

Signal description
Figure 6. I²C bus protocol
SCL
SDA
Start
condition
M24C16, M24C08, M24C04, M24C02, M24C01
SDA
Input
SDA
Change
Stop
condition
SCL
SDA
1
2
3
MSB
Start
condition
7
8
9
ACK
SCL
1
2
3
7
8
9
SDA
MSB
ACK
Stop
condition
AI00792c
Table 3.
Device select code
Device type identifier⁽¹⁾
Chip Enable^(2),(3)
RW
b7
b6
b5
b4
b3
b2
b1
b0
M24C01 select code
1
0
1
0
E2
E1
E0
RW
M24C02 select code
1
0
1
0
E2
E1
E0
RW
M24C04 select code
1
0
1
0
E2
E1
A8
RW
M24C08 select code
1
0
1
0
E2
A9
A8
RW
M24C16 select code
1
0
1
0
A10
A9
A8
RW
1. The most significant bit, b7, is sent first.
2. E0, E1 and E2 are compared against the respective external pins on the memory device.
3. A10, A9 and A8 represent most significant bits of the address.
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Doc ID 5067 Rev 17