BLUENRG-1 Datasheet, PDF (10/173 Pages) STMicroelectronics – Bluetooth low energy wireless system-on-chip

List of figures
List of figures
BlueNRG-1
Figure 1: BlueNRG-1 architecture block diagram .....................................................................................11
Figure 2: BlueNRG-1 single chip RF software layers ...............................................................................12
Figure 3: BlueNRG-1 network processor RF software layers...................................................................13
Figure 4: BlueNRG-1 power management state machine........................................................................16
Figure 5: Clock tree...................................................................................................................................20
Figure 6: Reset and wakeup generation...................................................................................................21
Figure 7: Block diagram of ADC ...............................................................................................................27
Figure 8: DMA request mapping in BlueNRG-1 .......................................................................................41
Figure 9: UART character frame...............................................................................................................62
Figure 10: Hardware flow control between two similar devices................................................................64
Figure 11: PWM signal............................................................................................................................117
Figure 12: MFT mode 1 block diagram...................................................................................................118
Figure 13: MFT mode 1a block diagram.................................................................................................119
Figure 14: MFT mode 2 block diagram...................................................................................................121
Figure 15: MFT mode 3 block diagram...................................................................................................122
Figure 16: MFT mode 4 block diagram...................................................................................................123
Figure 17: BlueNRG-1 pin out top view (QFN32) ...................................................................................145
Figure 18: BlueNRG-1 ball out top view (WCSP34) ...............................................................................146
Figure 19: BlueNRG-1 ball out bottom view (WCSP34) .........................................................................147
Figure 20: Application circuit: active DC-DC converter QFN32 package ...............................................151
Figure 21: Application circuit: non-active DC-DC converter QFN32 package........................................151
Figure 22: Application circuit: active DC-DC converter WCSP34 package............................................152
Figure 23: Application circuit: non active DC-DC converter WCSP34 package.....................................152
Figure 24: High speed oscillator block diagram......................................................................................161
Figure 25: QFN32 (5 x 5 x 1 pitch 0.5 mm) package outline ..................................................................166
Figure 26: QFN32 (5 x 5 x 1 pitch 0.5 mm) package detail "A" .............................................................167
Figure 27: WLCSP34 (2.66 x 2.56 x 0.5 pitch 0.4 mm) package outline................................................168
Figure 28: Flip Chip CSP (2.71 x 2.58 x 0.5 pitch 0.4 mm) package reflow profile recommendation ....170
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