STE36N50-DK Datasheet, PDF (1/9 Pages) STMicroelectronics – N-CHANNEL ENHANCEMENT MODE POWERMOS TRANSISTORANDULTRA-FAST DIODEINISOTOPPACKAGE

STE36N50-DK
N - CHANNEL ENHANCEMENT MODE POWER MOS
TRANSISTOR AND ULTRA-FAST DIODE IN ISOTOP PACKAGE
TYPE
STE36N50-DK
VDSS
500 V
R DS( on)
< 0.14 Ω
ID
36 A
s DEDICATED FOR POWER FACTOR
CORRECTOR APPLICATIONS
s LOW GATE CHARGE MOSFET
s TURBOSWITCH DIODE INCORPORATED
s HIGH CURRENT POWER MODULE
s AVALANCHE RUGGED TECHNOLOGY
s VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
s EASY TO MOUNT
s EXTREMELY LOW R_th JUNCTION TO CASE
s VERY LOW DRAIN TO CASE CAPACITANCE
s VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
s ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
s SMPS & UPS
s MOTOR CONTROL
s WELDING EQUIPMENT
s POWER FACTOR CORRECTOR
s ASYMMETRICAL HALF BRIDGE SMPS
(WITH COMPLIMENTARY STE36N50-DA)
MOSFET ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
VD S Drain-Source Voltage (VGS = 0)
VDG R Drain-Gate Voltage (RGS = 20 kΩ)
V_GS Gate-Source Voltage
ID
Drain Current (continuous) at T c = 25 ^oC
ID
Drain Current (continuous) at T c = 100 ^oC
I_DM(•) Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 ^oC
Derating Factor
T_stg Storage Temperature
Tj Max. Operating Junction Temperature
VISO Insulation Withstand Voltage (AC-RMS)
(•) Pulse width limited by safe operating area
September 1994
1
2
4
3
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
Value
500
500
± 20
36
24
144
380
3.3
-55 to 150
150
2500
Unit
V
V
V
A
A
A
W
W /^o C
o_C
o_C
V
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