STE110NS20FD Datasheet, PDF (1/8 Pages) STMicroelectronics – N-CHANNEL 200V - 0.022W - 110A ISOTOP MESH OVERLAY™ Power MOSFET

STE110NS20FD
N-CHANNEL 200V - 0.022Ω - 110A ISOTOP
MESH OVERLAY™ Power MOSFET
TYPE
V_DSS
R_DS(on)
I_D
STE110NS20FD
200V < 0.024Ω 110 A
n TYPICAL R_DS(on) = 0.022Ω
n EXTREMELY HIGH dv/dt CAPABILITY
n 100% AVALANCHE TESTED
n GATE CHARGE MINIMIZED
n ± 20V GATE TO SOURCE VOLTAGE RATING
n LOW INTRINSIC CAPACITANCE
n FAST BODY-DRAIN DIODE:LOW t_rr, Q_rr
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patented STrip layout cou-
pled with the Company’s proprietary edge termina-
tion structure, gives the lowest RDS(ON) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
APPLICATIONS
n HIGH CURRENT, HIGH SPEED SWITCHING
n SWITCH MODE POWER SUPPLY (SMPS)
n DC-AC CONVERTER FOR WELDING
EQUIPMENT AND UNINTERRUPTABLE
POWER SUPPLY AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
V_DGR
Drain-source Voltage (V_GS = 0)
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
I_D
I_D
I_DM (l)
P_TOT
Gate- source Voltage
Drain Current (continuos) at T_C = 25°C
Drain Current (continuos) at T_C = 100°C
Drain Current (pulsed)
Total Dissipation at T_C = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
V_ISO
Insulation Winthstand Voltage (AC-RMS)
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
January 2002
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
Value
200
200
±20
110
69
440
500
4
25
2500
–65 to 150
150
Unit
V
V
V
A
A
A
W
W/°C
V/ns
V
°C
°C
(1)I_SD ≤110A, di/dt ≤200A/µs, V_DD ≤ V_(BR)DSS, T_j ≤ T_JMAX
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