STD9N10 Datasheet, PDF (1/10 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR

STD9N10
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
TYPE
ST D9N10
VDSS
RDS(on)
ID
100 V < 0.27 Ω
9A
s TYPICAL RDS(on) = 0.23 Ω
s AVALANCHE RUGGED TECHNOLOGY
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100^oC
s LOW GATE CHARGE
s HIGH CURRENT CAPABILITY
s 175^oC OPERATING TEMPERATURE
s APPLICATION ORIENTED
CHARACTERIZATION
s THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX ”-1”)
s SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX ”T4”)
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SOLENOID AND RELAY DRIVERS
s REGULATORS
s DC-DC & DC-AC CONVERTERS
s MOTOR CONTROL, AUDIO AMPLIFIERS
s AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
3
2
1
IPAK
TO-251
(Suffix ”-1”)
3
1
DPAK
TO-252
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS Drain-source Voltage (V_GS = 0)
VDGR Drain- gate Voltage (RGS = 20 kΩ)
V_GS Gate-source Voltage
I_D
Drain Current (continuous) at T_c = 25 ^oC
ID
Drain Current (continuous) at Tc = 100 ^oC
IDM(•)
P_tot
Drain Current (pulsed)
Total Dissipation at T_c = 25 ^oC
Derating Factor
Tstg St orage Temperature
Tj
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
March 1996
Value
100
100
± 20
9
6
36
45
0.3
-65 to 175
175
Uni t
V
V
V
A
A
A
W
W/^oC
o_C
o_C
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