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SST89E52RD2_06 Datasheet, PDF (64/81 Pages) Silicon Storage Technology, Inc – FlashFlex51 MCU
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
Data Sheet
TABLE 14-2: Reliability Characteristics
Symbol
Parameter
Minimum Specification Units Test Method
NEND1
TDR1
Endurance
Data Retention
10,000
100
Cycles JEDEC Standard A117
Years JEDEC Standard A103
ILTH1
Latch Up
100 + IDD
mA JEDEC Standard 78
T14-2.0 1255
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 14-3: AC Conditions of Test
Input Rise/Fall Time . . . . . . . . . . . . . . . 10 ns
Output Load . . . . . . . . . . . . . . . . . . . . . CL = 100 pF
See Figures 14-8 and 14-10
T14-3.0 1255
TABLE 14-4: Recommended System Power-up Timings
Symbol
Parameter
Minimum
Units
TPU-READ1
Power-up to Read Operation
100
µs
TPU-WRITE1 Power-up to Write Operation
100
µs
T14-4.0 1255
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter
TABLE 14-5: Pin Impedance (VDD=3.3V, TA=25 °C, f=1 Mhz, other pins open)
Parameter Description
Test Condition
Maximum
CI/O1
CIN1
I/O Pin Capacitance
Input Capacitance
VI/O = 0V
VIN = 0V
15 pF
12 pF
LPIN2
Pin Inductance
20 nH
T14-5.0 1255
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
2. Refer to PCI spec.
©2006 Silicon Storage Technology, Inc.
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S71255-05-000
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