SST89E58RD2 Datasheet, PDF (43/91 Pages) Silicon Storage Technology, Inc – FlashFlex51 MCU

FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
TABLE 4-6: IAP COMMANDS¹ FOR SST89E/V516RD2
Operation
Chip-Erase³
Block-Erase⁵
Sector-Erase⁵
Byte-Program⁵
Byte-Verify (Read)⁵
Prog-SB1⁹
Prog-SB2⁹
Prog-SB3⁹
Prog-SC0⁹
Enable-Clock-Double⁹
SFCM [6:0]²
01H
0DH
0BH
0EH
0CH
0FH
03H
05H
09H
08H
SFDT [7:0]
55H
55H
X
DI⁸
DO⁸
AAH
AAH
AAH
AAH
AAH
SFAH [7:0]
X⁴
AH
AH⁶
AH
AH
X
X
X
5AH
55H
SFAL [7:0]
X
X
AL⁷
AL
AL
X
X
X
X
X
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
2. Interrupt/Polling enable for flash operation completion
SFCM[7] =1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
4. X can be V_IL or V_IH, but no other value.
5. Refer to Table 4-5 for address resolution
6. AH = Address high order byte
7. AL = Address low order byte
8. DI = Data Input, DO = Data Output, all other values are in hex.
9. Instruction must be located in Block 1 or external code memory.
Note: DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
T4-6.0 1255
TABLE 4-7: IAP COMMANDS¹ FOR SST89E/V5XRD2
Operation
Chip-Erase³
Block-Erase
Sector-Erase
Byte-Program
Byte-Verify (Read)⁸
Prog-SB1⁹
Prog-SB2⁹
Prog-SB3⁹
Prog-SC0⁹
Prog-SC1⁹
Enable-Clock-Double⁹
SFCM [6:0]²
01H
0DH
0BH
0EH
0CH
0FH
03H
05H
09H
09H
08H
SFDT [7:0]
55H
55H
X
DI⁷
DO⁷
AAH
AAH
AAH
AAH
AAH
AAH
SFAH [7:0]
X⁴
AH⁵
AH
AH
AH
X
X
X
5AH
AAH
55H
SFAL [7:0]
X
X
AL⁶
AL
AL
X
X
X
X
X
X
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
2. Interrupt/Polling enable for flash operation completion
SFCM[7] =1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
4. X can be V_IL or V_IH, but no other value.
5. AH = Address high order byte
6. AL = Address low order byte
7. DI = Data Input, DO = Data Output, all other values are in hex.
8. SFAH[7:5] = 111b selects Block 1, SFAH[7] = 0b selects Block 0
9. Instruction must be located in Block 1 or external code memory.
Note: DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
T4-7.0 1255
©2004 Silicon Storage Technology, Inc.
43
S71255-00-000
3/04