W40S11-02 Datasheet, PDF (6/9 Pages) Cypress Semiconductor – SDRAM Buffer - 2 DIMM (Mobile)

W40S11-02
Signaling from System Core Logic
Start Condition
Slave Address
(First Byte)
Command Code
(Second Byte)
Byte Count
(Third Byte)
SDATA
MSB
LSB
11010010
MSB
LSB
MSB
MSB
Last Data Byte
(Last Byte)
Stop C
LS
SCLOCK
1 2 3 4 5 6 7 8A1 2 3 4 5 6 7 8A 1 2 3 4
12345678
SDATA
Signaling by Clock Device
Acknowledgment Bit
from Clock Device
Figure 2. Serial Data Bus Write Sequence
SDATA
SCLOCK
t_STHD
t_LOW
t_HIGH
t_DSU
t_R
t_F
t_DHD
t_SP
t_SPSU t_STHD
Figure 3. Serial Data Bus Timing Diagram
t_SPF
t_SPSU
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Parameter
V_DD, V_IN
T_STG
T_A
T_B
Description
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
0 to +70
°C
–55 to +125
°C
Rev 1.0, Dec. 01, 2006
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