W191 Datasheet, PDF (4/9 Pages) SpectraLinear Inc – Skew Controlled SDRAM Buffer

W191
Absolute Maximum Ratings^[3]
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Parameter
V_DDQ3, V_IN
T_STG
T_B
T_A
T_A
Description
Voltage on any pin with respect to GND
Storage Temperature
Ambient Temperature under Bias
Operating Temperature (Commercial)
Operating Temperature (Industrial)
Rating
Unit
–0.5 to + 7.0
V
–65 to + 150
°C
–55 to + 125
°C
0 to + 70
°C
–40 to + 85
°C
DC Electrical Characteristics: T_A = 0°C to +70°C (Commercial), V_DDQ3 = 3.3V ± 5%,T_A = –40°C to +85°C (Industrial),
V_DDQ3 = 3.3V ± 5% ^[4]
Parame-
ter
Description
Test Condition
Min.
Typ.
Max.
I_DD
3.3V Supply Current
BUF_IN = 100 MHz
173
I_DD
3.3V Supply Current in three-state
BUF_IN = 100 MHz
5
Logic Inputs (BUF_IN, OE, SCLOCK, SDATA)
V_IL
Input Low Voltage
V_IH
Input High Voltage
I_ILEAK
I_ILEAK
Input Leakage Current, BUF_IN
Input Leakage Current^[5]
Logic Outputs (SDRAM0:5)
GND–0.3
2.0
–5
–20
0.8
V_DDQ3+0.5
+5
+5
V_OL
Output Low Voltage
V_OH
Output High Voltage
I_OL
Output Low Current
I_OH
Output High Current
Pin Capacitance/Inductance
I_OL = 1 mA
I_OH = –1 mA
V_OL = 1.5V
V_OH = 1.5V
50
3.1
65
100
160
70
110
185
C_IN
Input Pin Capacitance (Except BUF_IN)
5
C_OUT
Output Pin Capacitance
6
L_IN
Input Pin Inductance
7
Notes:
: ^{3. Multiple supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.}
4. Outputs loaded by 6” 60 transmission lines with 20 pF capacitors.
5. OE, SCLOCK, and SDATA logic pins have a 250-k: internal pull-up resistor (not CMOS level).
Unit
mA
mA
V
V
µA
µA
mV
V
mA
mA
pF
pF
nH
Rev 1.0, November 20, 2006
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