W191 Datasheet, PDF (1/9 Pages) SpectraLinear Inc – Skew Controlled SDRAM Buffer

W191
Skew Controlled SDRAM Buffer
Features
• Six skew controlled CMOS outputs
• Output skew between any two outputs is less than 150 ps
• SMBus Serial configuration interface
• 2.5 ns to 5 ns propagation delay
• DC to 133 MHz operation (Commercial)
• DC to 100 MHz operation (Industrial)
• Single 3.3V supply voltage
• Low power CMOS design packaged in a 16-pin SSOP
(Small Shrink Outline Package)
Block Diagram
Key Specifications
Supply Voltages: ...................................... V_DDQ3 = 3.3V ±5%
Operating Temperature: (Commercial) ............. 0°C to +70°C
Operating Temperature: (Industrial) .............. –40°C to +85°C
Input Threshold:...................................................1.5V typical
Maximum Input Voltage: .................................. V_DDQ3 + 0.5V
Input Frequency: (Commercial) ........................0 to 133 MHz
Input Frequency: (Industrial).............................0 to 100 MHz
BUF_IN to SDRAM0:5 Propagation Delay:.......2.5 ns to 5 ns
Min. Output Edge Rate: ............................................. 1.0V/ns
Max. Output Skew: ..................................................... 150 ps
Output Duty Cycle:...................................45/55% worst case
Output Impedance: ...................................................15: typ.
Pin Configuration^[1]
SDATA
SCLOCK
SMBus
Device Control
BUF_IN
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM0
1
GND
2
SDRAM1
3
BUF_IN
4
GND
5
SDRAM2
6
VDDQ3
7
SDATA
8
16
VDDQ3
15
SDRAM5
14
GND
13
SDRAM4
12
VDDQ3
11
SDRAM3
10
GND
9
SCLK
Note:
1. Internal pull-up resistor of 250K on SDATA and SCLK.
Rev 1.0, November 20, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:[phone] Fax:[phone]
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