CY28437 Datasheet, PDF (21/22 Pages) SpectraLinear Inc – Clock Generator for Intel Grantsdale Chipset

CY28437
For Differential CPU, SRC and DOT96 Output Signals
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
CPUT
SRCT
D O T96T
:
  :
CPUC
SRCC
D O T96C
:
IR E F
:
   : D iffe re n tia l
   :
M easurem ent
P o in t
2pF
M easurem ent
P o in t
2pF
Figure 9. 0.7V Single-ended Load Configuration
3.3V sig n als
T DC
-
-
3 .3 V
2 .4 V
1 .5 V
0 .4 V
0V
TR
TF
Figure 10. Single-ended Output Signals (for AC Parameters Measurement)
Ordering Information
Part Number
Lead-free
CY28437OXC
CY28437OXCT
CY28437ZXC
CY28437ZXCT
Package Type
56-pin SSOP
56-pin SSOP – Tape and Reel
56-pin TSSOP
56-pin TSSOP – Tape and Reel
Product Flow
Commercial, 0q to 85qC
Commercial, 0q to 85qC
Commercial, 0q to 85qC
Commercial, 0q to 85qC
Rev 1.0, November 20, 2006
Page 21 of 22