CY28437 Datasheet, PDF (15/22 Pages) SpectraLinear Inc – Clock Generator for Intel Grantsdale Chipset

CY28437
VDD_A = 2.0V
S0
Power Off
S1
Delay
>0.25mS
VTT_PWRGD# = Low
S2
Sample
Inputs straps
VDD_A = off
S3
Normal
Operation
VTT_PWRGD# = toggle
Wait for <1.8ms
Enable Outputs
Figure 6. Clock Generator Power-up/Run State Diagram
Rev 1.0, November 20, 2006
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