S71GL-N Datasheet, PDF (8/11 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory and RAM

Data Sheet (Advance Information)
5. Ordering Information
The order number is formed by a valid combinations of the following:
S71GL
064 N A0 BF
W0
Z0
PACKING TYPE
0 = Tray
2 = 7” Tape and Reel
3 = 13” Tape and Reel
MODEL NUMBER
See the Valid Combinations table.
PACKAGE MODIFIER
0 = 7 x 9 mm, 1.2 mm height, 56 balls (TLC056)
TEMPERATURE RANGE
W = Wireless (-25°C to +85°C)
PACKAGE TYPE
BF = Fine-pitch BGA Lead (Pb)-free package
pSRAM / SRAM DENSITY
B0 = 32 Mb pSRAM
A0 = 16 Mb pSRAM
40 = 4 Mb pSRAM
80 = 8 Mb pSRAM
PROCESS TECHNOLOGY
N = 110 nm, MirrorBit Technology
FLASH DENSITY
064 = 64Mb
032 = 32Mb
PRODUCT FAMILY
S71GL Multi-chip Product (MCP)
3.0-volt Page Mode Flash Memory and RAM
Table 5.1 Valid Combinations
Base Ordering
Part Number
S71GL032N40
S71GL032N80
S71GL032NA0
S71GL064NA0
S71GL064NA0
S71GL064NB0
S71GL064NB0
S71GL064N Valid Combinations
Package & Package Modifier/Model
Temperature
Number
0K
0P
0K
0P
0U
BFW
0Z
0U
0Z
0U
0Z
Note
1. Type 0 is standard. Specify other options as required.
Packing Type
0, 2, 3 (1)
Speed Options (ns)/Boot
Sector Option
90 / Bottom Boot Sector
90 / Top Boot Sector
90 / Bottom Boot Sector
90 / Top Boot Sector
90 / Bottom Boot Sector
90 / Top Boot Sector
90 / Bottom Boot Sector
90 / Top Boot Sector
90 / Bottom Boot Sector
90 / Top Boot Sector
(p)SRAM Type/
Access Time
(ns)
pSRAM9 / 70
pSRAM9 / 70
pSRAM7 / 70
pSRAM7 / 70
pSRAM8 / 70
Package
Marking
TLC056
Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult your local
sales office to confirm availability of specific valid combinations and to check on newly released
combinations.
8
S71GL-N Based MCPs
S71GL-N_00_02 June 19, 2007