S29GL256P90TFCR20 Datasheet, PDF (67/81 Pages) SPANSION – MirrorBit® Flash Family

Data Sheet
11.7.5 Erase And Programming Performance
Table 11.8 Erase And Programming Performance
Parameter
Sector Erase Time
S29GL128P
Chip Erase Time
S29GL256P
S29GL512P
S29GL01GP
Total Write Buffer Time (Note 3)
Total Accelerated Write Buffer Programming Time
(Note 3)
S29GL128P
Chip Program Time
S29GL256P
S29GL512P
S29GL01GP
Typ
(Note 1)
0.5
64
128
256
512
480
432
123
246
492
984
Max
(Note 2)
3.5
256
512
1024
2048
Unit
Comments
sec
Excludes 00h programming
sec
prior to erasure (Note 4)
µs
µs
Excludes system level
overhead (Note 5)
sec
Notes
1. Typical program and erase times assume the following conditions: 25°C, 3.6 V V_CC, 10,000 cycles, checkerboard pattern.
2. Under worst case conditions of -40°C, V_CC = 3.0 V, 100,000 cycles.
3. Effective write buffer specification is based upon a 32-word write buffer operation.
4. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Tables 12.1–12.4.
11.7.6 TSOP Pin and BGA Package Capacitance
Table 11.9 Package Capacitance
Parameter Symbol
Parameter Description
C_IN
C_OUT
C_IN2
WP#/ACC
Input Capacitance
Output Capacitance
Control Pin Capacitance
Separated Control Pin
RESET#
Separated Control Pin
CE#
Separated Control Pin
Notes
1. Sampled, not 100% tested.
2. Test conditions T_A = 25°C, f = 100 MHz.
Test Setup
V_IN = 0
V_OUT = 0
V_IN = 0
V_IN = 0
V_IN = 0
V_IN = 0
Typ
Max
6
10
10
12
8
10
42
45
25
28
22
25
Unit
pF
pF
pF
pF
pF
pF
October 22, 2012 S29GL-P_00_A14
S29GL-P MirrorBit^® Flash Family
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