CXD2598Q Datasheet, PDF (8/147 Pages) Sony Corporation – CD Digital Signal Processor with Built-in Digital Servo and DAC

CXD2598Q
Electrical Characteristics
1. DC Characteristics
(VDD = AVDD = 5.0V ± 5%, VSS = AVSS = 0V, Topr = –20 to +75°C)
Item
Conditions Min.
Typ. Max. Unit Applicable pins
High level input voltage VIH (1)
Input voltage (1)
Low level input voltage VIL (1)
0.7VDD
0.3VDD
V _{∗1, ∗11}
V
High level input voltage VIH (2)
0.8VDD
Input voltage (2)
Schmitt input
Low level input voltage VIL (2)
0.2VDD
V _{∗2, ∗12}
V
High level input voltage VIH (3)
Input voltage (3)
Low level input voltage VIL (3)
0.8VDD
Input voltage (4) Input voltage
VIN (4) Analog input Vss
Output voltage ^{High level output voltage VOH (1) IOH = –2mA}
(1)
Low level output voltage VOL (1) IOL = 4mA
VDD – 0.8
Vss
Output voltage ^{High level output voltage VOH (2) IOH = –4mA}
(2)
Low level output voltage VOL (2) IOL = 8mA
VDD – 0.8
Vss
Output voltage ^{High level output voltage VOH (3) IOH = –6mA}
(3)
Low level output voltage VOL (3) IOL = 4mA
VDD – 0.8
Vss
Output voltage ^{High level output voltage VOH (4) IOH = –0.28mA VDD – 0.5}
(4)
Low level output voltage VOL (4) IOL = 0.36mA Vss
Input leak current (1)
ILI (1)
VIN = VSS
or VDD
–10
0.2VDD
VDD
VDD
0.4
VDD
0.4
VDD
0.4
VDD
0.4
V _∗3
V
V ^{∗4, ∗9, ∗10}
V
∗5
V
V _∗6
V
V
∗7
V
V
∗8
V
10
µA ^{∗1, ∗2}
Input leak current (2)
Input leak current (3)
Input leak current (4)
ILI (2)
VIN = VSS
or VDD
–40
ILI (3) VI = 1.5 to 3.5V –20
ILI (4) VI = 0 to 5.0V
–40
40
µA ^{∗3, ∗11, ∗12}
20
µA ^∗9
600
µA ^∗10
Applicable pins
∗1 _{SYSM, DATA, XLAT, PWMI, SSTP, XTSL, TEST, TES1, MD2, SCSY}
∗2 _{SQCK, XRST, CLOK, ASYE}
∗3 _{LRCKI, PCMDI, BCKI, EMPHI}
∗4 _{ASYI, RFAC, CLTV, FILI, VCTL}
∗5 _{SQSO, SBSO, SENS, ATSK, WFCK, XUGF, XPCK, GFS, C2PO, SCOR, C4M, WDCK, COUT, MIRR,}
DFCT, FOK, LOCK, FSTIO, SFDR, SRDR, TFDR, TRDR, FFDR, FRDR, ASYO, DOUT, LRCK, PCMD,
BCK, EMPH, RMUT, LMUT, SOUT, SOCK, XOLT
∗6 _V16M
∗7 _{MDP, PCO, VPCO}
∗8 _FILO
∗9 _{VC, FE, SE, TE, CE}
∗10 _RFDC
∗11 _{EXCK, ATSK, COUT, MIRR, DFCT, FOK, LOCK, PWMI, V16M, FSTIO}
∗12 _SCLK
–8–