CXD2598Q Datasheet, PDF (125/147 Pages) Sony Corporation – CD Digital Signal Processor with Built-in Digital Servo and DAC

CXD2598Q
$37 (preset: $37 50 BA)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
FZSH FZSL SM5 SM4 SM3 SM2 SM1 SM0 AGS AGJ AGGF AGGT AGV1 AGV2 AGHS AGHT
FZSH, FZSL: FZC (Focus Zero Cross) slice level
Default value: 01 (1/8 × VDD × 0.4, VDD: supply voltage); FE input conversion
FZSH
0
∗0
1
1
FZSL
0
1
0
1
Slice level
1/4 × VDD × 0.4
1/8 × VDD × 0.4
1/16 × VDD × 0.4
1/32 × VDD × 0.4
∗: preset
SM5 to SM0:
AGS:
AGJ:
AGGF:
AGGT:
Sled move voltage
Default value: 010000 ((1 ± 16/64) × VDD/2, VDD: PWM driver supply voltage)
Sled drive output conversion
AGCNTL self-stop on/off
Default value: 1 (on)
AGCNTL convergence completion judgment time during low sensitivity adjustment (31/63ms,
when MCK = 128Fs)
Default value: 0 (63ms)
Focus AGCNTL internally generated sine wave amplitude (small/large)
Default value: 1 (large)
Tracking AGCNTL internally generated sine wave amplitude (small/large)
Default value: 1 (large)
FE/TE input conversion
AGGF
0 (small)
1 (large)^∗
1/32 × VDD × 0.4
1/16 × VDD × 0.4
AGGT
0 (small)
1 (large)^∗
1/16 × VDD × 0.4
1/8 × VDD × 0.4
∗: preset
AGV1:
AGV2:
AGHS:
AGHT:
AGCNTL convergence sensitivity during high sensitivity adjustment; high/low
Default value: 1 (high)
AGCNTL convergence sensitivity during low sensitivity adjustment; high/low
Default value: 0 (low)
AGCNTL high sensitivity adjustment on/off
Default value: 1 (on)
AGCNTL high sensitivity adjustment time (128/256ms, when MCK = 128Fs)
Default value: 0 (256ms)
– 125 –