LPC47M112-MC Datasheet, PDF (94/193 Pages) SMSC Corporation – ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE

Table 46 - PC/AT and PS/2 Available Registers
AVAILABLE REGISTERS
BASE + ADDRESS PC-AT PS/2 (MODEL 30) ACCESS PERMITTED
Access to these registers DOES NOT wake up the part
00H
----
SRA
R
01H
----
SRB
R
02H
DOR (1)
DOR (1)
R/W
03H
---
---
---
04H
DSR (1)
DSR (1)
W
06H
---
---
---
07H
DIR
DIR
R
07H
CCR
CCR
W
Access to these registers wakes up the part
04H
MSR
MSR
R
05H
Data
Data
R/W
Note 1: Writing to the DOR or DSR does not wake up the part, however, writing any of the motor enable bits or doing a
software reset (via DOR or DSR reset bits) will wake up the part.
System Interface Pins
Table 47 gives the state of the interface pins in the powerdown state. Pins unaffected by the powerdown are labeled
"Unchanged".
Table 47 – State of System Pins in Auto Powerdown
SYSTEM PINS
LAD[3:0]
nLDRQ
nLPCPD
nLFRAME
nPCI_RESET
PCI_CLK
SER_IRQ
STATE IN AUTO POWERDOWN
Unchanged
Unchanged
Unchanged
Unchanged
Unchanged
Unchanged
Unchanged
FDD Interface Pins
All pins in the FDD interface which can be connected directly to the floppy disk drive itself are either DISABLED or
TRISTATED.
Pins used for local logic control or part programming are unaffected. Table 48 depicts the state of the floppy disk drive
interface pins in the powerdown state.
Table 48 - State of Floppy Disk Drive Interface Pins in Powerdown
FDD PINS
nRDATA
nWRTPRT
nTRK0
nINDEX
nDSKCHG
nMTR0
nDS0
nDIR
nSTEP
nWDATA
nWGATE
nHDSEL
DRVDEN[0:1]
STATE IN AUTO POWERDOWN
INPUT PINS
Input
Input
Input
Input
Input
OUTPUT PINS
Tristated
Tristated
Active
Active
Tristated
Tristated
Active
Active
SMSC DS – LPC47M112
Page 94
Rev. 01/09/2001