USB97C100 Datasheet, PDF (6/64 Pages) SMSC Corporation – Multi-Endpoint USB Peripheral Controller

QFP PIN
NUMBER
102
SYMBOL
nMASTER
21-24 IRQ[3:0]
30
XTAL1/
Clock In
31
XTAL2
99
EXTCLK
33
CLKOUT
77, 79
USBD-
USDB+
45-52 FD[7:0]
75, 74, 68,
65, 64, 69,
70, 63, 73,
43, 72, 71,
62-58,
56-54
42
66
44
98
FA[19:0]
nFRD
nFWR
nFCE
FALE
25,57,76
101,121
78
8, 20, 32,
53, 67, 80,
97, 116
VCC
VCC3.3
GND
41-34 GPIO[7:0]
PIN DESCRIPTION
External Bus master, active low
This signal forces the USB97C100 to immediately tri-state its
external bus, even if internal transactions are not complete. All
shared ISA signals are tri-stated, except 8237 nDACKs, which
can be used in gang mode to provide external bus-master
handshaking. This pin must be used with some handshake
mechanism to avoid data corruption.
Interrupt Request 3-0; active high
These signals are driven by ISA devices on the ISA bus to
interrupt the 8051.
24MHz Crystal or clock input.
This pin can be connected to one terminal of the crystal or can
be connected to an external clock when a crystal is not used.
24MHz Crystal
This is the other terminal of the crystal.
Alternate clock to 8237
An external clock can be used for the internal 8237. This clock
can be used to synchronize the 8237 to other devices.
Clock output.
This clock frequency is the same as the 8051 running clock.
This clock is stopped when the 8051 is stopped. Peripherals
should not use this clock when they are expected to run when
the 8051 is stopped. This clock can be used to synchronize
other devices to the 8051.
USB INTERFACE
USB Upstream Connection signals
These are two point-to-point signals and driven differentially.
FLASH INTERFACE
Flash ROM Data Bus
These signals are used to transfer data between 8051 and the
external FLASH.
Flash ROM Address Bus
These signals address memory locations within the FLASH.
Flash ROM Read; active low
Flash ROM Write; active low
Flash ROM Chip Select; active low
Flash ROM address latch enable
POWER SIGNALS
+3.3V power or 5V
+3.3V power for USB
Ground Reference
MISCELLANEOUS
General Purpose I/O.
These pins can be configured as inputs or outputs under
software control.
BUFFER
TYPE
IP
I
ICLKx
OCLKx
ICLK
O8
IO-U
IO8
O8
O8
O8
O8
O8
I/O16
SMSC DS – USB97C100
Page 6
Rev. 01/03/2001