37C957FR Datasheet, PDF (202/328 Pages) SMSC Corporation – ULTRA I/O CONTROLLER FOR PORTABLE APPLICATIONS

Memory Mapped Control Registers
ACCESS.BUS Control register
Host
N/A
8051
0x7F31 (W)
Power
VCC1
Default
0x00
D7 D6
D5
D4
D3 D2 D1 D0
8051 R/W W W
W
W
W
W
W
W
Bit Def
PIN ES0 Reserved Reserved ENI STA STO ACK
Bit-7 PIN : (Pending Interrupt Not). Writing this bit to a logic ‘1’ deasserts all status bits except for
BB# (Bus Busy) - BB# is not affected. This is a self-clearing bit. Writing this bit to a logic
‘0’ has no effect.
ACCESS.BUS Status register
Host
N/A
8051
0x7F31 (R)
Power
VCC1
Default
0x81
8051 R/W
Bit Def
D7 D6 D5 D4 D3 D2
R
R
R
R
R
R
PIN 0 STS BER LRB AAS
D1 D0
R
R
LAB BB#
ACCESS.BUS Own Address register
Host
N/A
8051
0x7F32
Power
VCC1
Default
0x00
8051
R/W
Bit
Def
D7
D6
D5
D4
D3
D2
D1
D0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Slave
Address
6
Slave
Address
5
Slave
Address
4
Slave
Address
3
Slave
Address
2
Slave
Address
1
Slave
Address
0
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