37C672 Datasheet, PDF (165/173 Pages) SMSC Corporation – ENHANCED SUPER I/O CONTROLLER WITH FAST IR

Enhanced Super I/O Controller with Fast IR
Datasheet
Output Drivers
To facilitate higher performance data transfer, the use of balanced CMOS active drivers for critical signals
(Data, HostAck, HostClk, PeriphAck, PeriphClk) are used ECP Mode. Because the use of active drivers
can present compatibility problems in Compatible Mode (the control signals, by tradition, are specified as
open-collector), the drivers are dynamically changed from open-collector to totem-pole. The timing for the
dynamic driver change is specified in then IEEE 1284 Extended Capabilities Port Protocol and ISA
Interface Standard, Rev. 1.14, July 14, 1993, available from Microsoft. The dynamic driver change must
be implemented properly to prevent glitching the outputs.
PDATA
nSTROBE
t6
t3
t1
t2
t5
BUSY
t4
Figure 22.1 - Parallel Port FIFO Timing
NAME
t1
t2
t3
t4
t5
t6
DESCRIPTION
DATA Valid to nSTROBE Active
nSTROBE Active Pulse Width
DATA Hold from nSTROBE Inactive (Note 22.1)
nSTROBE Active to BUSY Active
BUSY Inactive to nSTROBE Active
BUSY Inactive to PDATA Invalid (Note 22.1)
MIN
TYP MAX UNITS
600
ns
600
ns
450
ns
500
ns
680
ns
80
ns
Note 22.1 The data is held until BUSY goes inactive or for time t3, whichever is longer. This only applies if another
data transfer is pending. If no other data transfer is pending, the data is held indefinitely.
SMSC FDC37C672
Page 165
DATASHEET
Rev. 10-29-03