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47N350 Datasheet, PDF (1/346 Pages) SMSC Corporation – LEGACY FREE KEYBOARD EMBEDDED CONTROLLER WITH SPI AND LPC DOCKING INTERFACE
LPC47N350
Legacy-Free
Keyboard/Embedded
Controller with SPI and
LPC Docking Interface
Product Features
■ 3.3V Operation with 5V Tolerant Buffers
■ ACPI 2.0 PC2001 Compliant
■ LPC Interface with Clock Run Support
— Decode I/O, Memory, and FWH cycles
— Serial IRQ Interface Compatible with Serialized
IRQ Support for PCI Systems
— 15 Direct IRQs
— ACPI SCI Interface
— nSMI output and supporting PM registers
— Shadowed write only registers
■ LPC Switching
— Hot Plug LPC Docking Interface
— Secondary Switchable LPC interface (3.3V only)
■ Internal 64K Flash ROM
— Programmed From Direct Parallel Interface,
8051, or LPC Host
— 2k-Byte Lockable Boot Block
— Can be Programed Without 8051 Intervention
■ Three Power Planes
— Low Standby Current in Sleep Mode
■ ACPI Embedded Controller Interface
■ Configuration Register Set Compatible with ISA Plug-
and-Play Standard (Version 1.0a)
■ High-Performance Embedded 8051 Keyboard and
System Controller
— Provides System Power Management
— System Watch Dog Timer (WDT)
— 8042 Style Host Interface
— Supports Interrupt and Polling Access
— 512 Bytes Executable RAM
— 512 Bytes Data RAM
— On-Chip Memory-Mapped Control Registers
— Access to RTC and CMOS Registers
— Up to 16x8 Keyboard Scan Matrix
— Two-16 Bit Timer/Counters
— Integrated Full-Duplex Serial Port Interface
— Eleven 8051 Interrupt Sources
— Thirty-Two 8-Bit, Host/8051 Mailbox Registers
— Thirty-Two Maskable Hardware Wake-Up Events
— Fast GATEA20
— Fast CPU_RESET
Datasheet
— Multiple Clock Sources and Operating
Frequencies
— IDLE and SLEEP Modes
— Fail-Safe Ring Oscillator
■ Real-Time Clock
— MC146818 and DS1287 Compatible
— 256 Bytes of Battery Backed CMOS in Two 128-
Byte Banks
— 128 Bytes of CMOS RAM Lockable in 4x32-Byte
Blocks
— 12- and 24-Hour Time Format
— Binary and BCD Format
— <2µA Standby Current (typ)
■ Two 8584-Style I2C/SMBus Controllers
— 8051 Controlled Logic Allows I2C/SMBus Master
or Slave Operation
— I2C/SMBus Controllers are Fully Operational on
Standby Power
— 2 Sets of Dedicated Pins per I2C/SMBus
Controller
■ Serial Peripheral Interface (SPI)
■ Four independent Hardware Driven PS/2 Ports
■ 41 General Purpose I/O Pins
— 25 Maskable Hardware Wake-Event Capable
— 6 Programmable Open-Drain/Push-Pull Outputs
■ Four Programmable Pulse-Width Modulator Outputs
— Independent Clock Rates
— 6-Bit Duty Cycle Granularity
— Operational in both Full on and Standby modes
■ Dual Fan Tachometer Inputs
■ Debug Port (UART)
— High-Speed 16550A-Compatible UART with 16-
Byte Send/Receive FIFOs
— Programmable Baud Rate Generator
— Relocatable to 480 Different Base I/O Addresses
— 15 IRQ Options
■ XNOR-Chain Test Mode
■ 128-Pin QFP and VTQFP Package
SMSC LPC47N350
DATASHEET
Revision 1.1 (01-14-03)