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HC652 Datasheet, PDF (3/9 Pages) System Logic Semiconductor – Octal 3-State Bus Transceivers and D Flip-Flops
SL74HC652
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VIH
Minimum High-Level VOUT=0.1 V or VCC-0.1 V
Input Voltage
IOUT≤ 20 µA
VIL
Maximum Low -Level VOUT=0.1 V or VCC-0.1 V
Input Voltage
IOUT ≤ 20 µA
VOH
Minimum High-Level VIN=VIH or VIL
Output Voltage
IOUT ≤ 20 µA
VIN=VIH or VIL
IOUT ≤ 6.0 mA
IOUT ≤ 7.8 mA
VOL
Maximum Low-Level VIN= VIL or VIH
Output Voltage
IOUT ≤ 20 µA
IIN
Maximum Input
Leakage Current
VIN=VIH or VIL
IOUT ≤ 6.0 mA
IOUT ≤ 7.8 mA)
VIN=VCC or GND
(Pins 1,2,3,21,22,and 23)
IOZ
Maximum Three-State Output in High-Impedance
Leakage Current
State
VIN= VIL or VIH
VOUT=VCC or GND,
I/O Pins
ICC
Maximum Quiescent VIN=VCC or GND
Supply Current
IOUT=0µA
(per Package)
VCC
Guaranteed Limit
V 25 °C ≤85 ≤125 Unit
to
°C °C
-55°C
2.0 1.5 1.5 1.5 V
4.5 3.15 3.15 3.15
6.0 4.2 4.2 4.2
2.0 0.5 0.5 0.5 V
4.5 1.35 1.35 1.35
6.0 1.8 1.8 1.8
2.0 1.9 1.9 1.9 V
4.5 4.4 4.4 4.4
6.0 5.9 5.9 5.9
4.5 3.98 3.84 3.7
6.0 5.48 5.34 5.2
2.0 0.1 0.1 0.1 V
4.5 0.1 0.1 0.1
6.0 0.1 0.1 0.1
4.5 0.26 0.33 0.4
6.0 0.26 0.33 0.4
6.0 ±0.1 ±1.0 ±1.0 µA
6.0 ±0.5 ±5.0 ±10 µA
6.0 8.0
80 160 µA
SLS
System Logic
Semiconductor