SKY66112-11_17 Datasheet, PDF (6/14 Pages) Skyworks Solutions Inc. – 2.4 GHz ZigBee/Thread/Bluetooth Smart Front-End Module

DATA SHEET • SKY66112-11: ZIGBEE/THREAD/BLUETOOTH SMART FEM
CHL Control Pin
The CHL pin controls the bias of the PA. For high VCC2 (for example, 3.0 V), high-power mode (CHL = 1) offers superior TX gain at minimal
cost in Icc. For VCC2 ≤ 2.0 V, low-power mode (CHL = 0) offers significant Icc savings.
24
22
20
18
16
14
12
10
0
Gain vs. POUT and VCC2, TX Mode
LP @ 1.8V
HP @ 1.8V
LP @ 3.0V
HP @ 3.0V
2 4 6 8 10 12 14 16 18 20 22 24
Output Power (dBm)
Figure 3. Effect of CHL on Gain
(VCC1 = 1.8 V, VDD = 3.0 V, f = 2440 MHz)
203225-003
Icc vs. POUT and VCC2, TX Mode
180
150
120
90
60
30
0
0
LP @ 1.8V
24
HP @ 1.8V
LP @ 3.0V
HP @ 3.0V
6 8 10 12 14 16 18 20 22 24
Output Power (dBm)
Figure 4. Effect of CHL on Supply Current
(VCC1 = 1.8 V, VDD = 3.0 V, f = 2440 MHz)
203225-004
Effect of VDD
VDD supplies the digital logic and the RF switches. It has a nominal level of 3.0 V and typically draws 5 to 20 μA in TX, RX, and bypass
modes. Lowering VDD to 1.8 V reduces TX gain by ~0.25 dB and RX gain by ~0.4 dB, but improves RX P1dB by ~0.25 dB.
Effect of VDD = 1.8 V, TX-LP Mode
POUT @ 1.8V
POUT @ 3.0V
Icc @ 1.8V
18
15
12
9
6
3
0
-10
-8
-6
-4
-2
0
Input Power (dBm)
Icc @ 3.0V
150
125
100
75
50
25
0
2
4
Figure 5. Effect of Lowering VDD
(VCC1 = VCC2 = 1.8 V, TX-LP mode, f = 2440 MHz)
203225-005
Effect of VDD = 1.8 V, RX-LNA Mode
SSG @ 1.8V
13
SSG @ 3V
P1dB @ 1.8V
P1dB @ 3V
-7
12.5
-7.5
12
-8
11.5
-8.5
11
-9
2400 2410 2420 2430 2440 2450 2460 2470 2480
Frequency (MHz)
203225-006
Figure 6. Effect of Lowering VDD
(VCC1 = VCC2 = 1.8 V, PIN = -25 dBm, RX-LNA Mode)
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
6
March 14, 2017 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 203225L