SP574B Datasheet, PDF (7/15 Pages) Sipex Corporation – 12-Bit Sampling A/D Converters

OUTPUT BITS
2
12/8
3
CS
A0 ⁴
5
R/C
CE ⁶
MSB
LSB
27 26 25 24 23 22 21 20 19 18 17 16
CONTROL
LOGIC
NIBBLE A
NIBBLE B
NIBBLE C
THREE–STATE BUFFERS AND CONTROL
12–BITS
-15V
R1
100KΩ
+15V
0 TO 10V
10V
IN
13
100KΩ
ANALOG
INPUTS
20V
IN 14
0 TO 20V
BIP
OFF 12
100Ω
OSCILLATOR
12–BITS
SAMPLE/HOLD
MSB
12–BIT SAR
STROBE
CDAC
LSB
COMP
28
STS
1 VLOGIC ^+5V
+
10µF
0.1µF
15 DGND
VREF
OUT 8
REF
AMP
REF
R2
100Ω
10
VREF
IN
VCC 7 ₊
10µF
+15V
VEE 11
0.1µF
9
AGND
N.C.
OFFSET/GAIN
TRIM NETWORK
Figure 2. Unipolar Input Connections
signals between ground traces and cross digital
lines at right angles only.
Grounding Considerations
Any ground path from the analog and digital
ground should be as low resistance as possible to
accommodate the ground currents present with
this device.
The analog ground current is approximately
6mA DC while the digital ground is 3mA DC.
The analog and digital common pins should be
tied together as close to the package as possible
to guarantee best performance. The code–de-
pendent currents flow through the V_LOGIC and
V_CC terminals and not through the analog and
digital common pins.
Power Supplies
The supply voltages for the SPx74B must be kept
as quiet as possible from noise pickup and also
regulated from transients or drops. Because the
part has 12–bit accuracy, voltage spikes on the
supply lines can cause several LSB deviations on
the output. Switching power supply noise can be a
problem. Careful filtering and shielding should be
employed to prevent the noise from being picked
up by the converter.
Capacitor bypass pairs are needed from each sup-
ply pin to its respective ground to filter noise and
counter the problems caused by the variations in
supply current. A 10µF tantalum and a 0.1µF
ceramic type in parallel between V_LOGIC (pin 1) and
digital common (pin15), and V_CC (pin 7) and
analog common (pin 9) is sufficient. V is gener-
EE
ated internally so pin 11 may be grounded or
connected to a negative supply if the SPx74B is
being used to upgrade an already existing design.
CALIBRATION AND CONNECTION
PROCEDURES
Unipolar
The calibration procedure consists of adjusting the
converter’s most negative output to its ideal value for
offset adjustment, and then adjusting the most positive
output to its ideal value for gain adjustment.
Starting with offset adjustment and referring to
Figure 2, the midpoint of the first LSB increment
should be positioned at the origin to get an output
code of all 0s. To do this, an input of +¹â„₂ LSB or
+1.22mV for the 10V range and +2.44mV for the
20V range should be applied to the SPx74B.
Adjust the offset potentiometer R₁ for code transi-
tion flickers between 0000 0000 0000 and 0000
0000 0001.
SP574B/674B/1674B/774B
12–Bit Sampling A/D Converters
7
© Copyright 2000 Sipex Corporation