SP706REN-L Datasheet, PDF (4/18 Pages) Sipex Corporation – Low Power Microprocessor Supervisory Circuits

PIN DESCRIPTION
NAME FUNCTION
Manual Reset - This input triggers a reset pulse
when pulled below 0.8V. This active-LOW input
MR has an internal 250µA pull-up current. It can be
driven from a TTL or CMOS logic line or shorted
to ground with a switch
SP705/706 SP707/708 SP813L/813M
DIP/
SOIC
µSOIC
DIP/
SOIC
µSOIC
DIP/
SOIC
µSOIC
1
3
1
3
1
3
V_CC
GND
+5V power supply
Ground reference for all signals
2
4
3
5
2
4
3
5
2
4
3
5
Power-Fail Input - When this voltage monitor input
PFI is less than 1.25V, PFO goes LOW. Connect PFI 4
6
to ground or V_CC when not in use.
PFO
Power-Fail Output - This output is HIGH until PFI
is less than 1.25V.
5
7
4
6
5
7
4
6
5
7
Watchdog Input - If this input remains HIGH or
LOW for 1.6s, the internal watchdog timer times
out and WDO goes LOW. Floating WDI or
WDI
connecting WDI to a high-impedance tri-state
buffer disables the watchdog feature. The internal
6
8
-
-
watchdog timer clears whenever RESET is
asserted, WDI is tri-stated, or whenever WDI sees
a rising or falling edge.
6
8
N.C. No Connect.
-
-
6
8
-
-
Active-LOW RESET Output - This output pulses
LOW for 200ms when triggered and stays LOW
whenever V_CC is below the reset threshold (4.65V
RESET
for the SP705/707/813L and 4.40V for the
SP706/708). It remains LOW for 200ms after V_cc
7
1
rises above the reset threshold or MR goes from
LOW to HIGH. A watchdog timeout will not trigger
RESET unless WDO is connected to MR.
7
1
-
-
Watchdog Output - This output pulls LOW when
the internal watchdog timer finishes its 1.6s count
and does not go HIGH again until the watchdog is
cleared. WDO also goes LOW during low-line
WDO
conditions. Whenever V_CC is below the reset
threshold, WDO stays LOW. However, unlike
8
2
-
-
RESET, WDO does not have a minimum pulse
width. As soon as V_CC is above the reset
threshold, WDO goes HIGH with no delay.
8
2
Active-HIGH RESET Output - This output is the
RESET
complement of RESET. Whenever RESET is
HIGH, RESET is LOW, and vice versa. Note the
-
-
SP813L/813M has a reset output only.
Table 1. Device Pin Description
8
2
7
1
SP705DS/09
SP705 Low Power Microprocessor Supervisory Circuits
4
© Copyright 2000 Sipex Corporation