SP703 Datasheet, PDF (13/16 Pages) Sipex Corporation – Low Power Microprocessor Supervisory with Battery Switch-Over

+5V
VCC
PFI
PFO
GND
R1
R2
V-
5.0 - 1.25
R1
=
1.25 - VTRIP
R2
PFO
+5V
0V
V-
*VTRIP ^0V
*VTRIP is a negative voltage
Figure 15. Monitoring a Negative Voltage
Buffered RESET connects to System Components
+5V
+5V
VCC
VCC
µP
RESET
RESET
4.7KΩ
GND
GND
Figure 16. Interfacing to Microprocessors with
Bidirectional RESET I/O
Interfacing to Microprocessors with
Bidirectional Reset Pins
Microprocessors with bidirectional reset pins,
such as the Motorola 68HC11 series, can
contend with this series' RESET output. If, for
example, the RESET output is driven high and
the µP wants to pull it low, indeterminate logic
levels may result. To correct this, connect a
4.7KΩ resistor between the RESET output and
the µP reset I/O, as in Figure 16. Buffer the
RESET output to other system components.
SP703/704DS/07
SP703/704 Low Power Microprocessor Supervisory
13
© Copyright 2000 Sipex Corporation