SP43503 Datasheet, PDF (5/10 Pages) SIPAT Co,Ltd – SP43503

SP43503
Product Specification
Table 5. Control Voltage
State
Bias Condition
Low
0 to +1.0 Vdc at 2 µA (typ)
High
+2.6 to +5 Vdc at 10 µA (typ)
Table 6. Latch and Clock Specifications
Latch Enable
X
↑
Shift Clock
↑
X
Function
Shift Register Clocked
Contents of shift register
transferred to attenuator core
Table 7. Parallel Truth Table
Parallel Control Setting
Attenuation Setting
D6 D5 D4 D3 D2
RF1-RF2
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
Reference I.L.
1 dB
2 dB
L
L
H
L
L
4 dB
L
H
L
L
L
H
L
L
L
L
H
H
H
H
H
8 dB
16 dB
31 dB
Table 8. Attenuation Word Truth Table
Attenuation Word
Attenuation
D7
D6
D5
D4
D3
D2
D1
D0
(LSB)
Setting
RF1-RF2
L
L
L
L
L
L
L
L Reference I.L.
L
L
L
L
L
H
L
L
1 dB
L
L
L
L
H
L
L
L
2 dB
L
L
L
H
L
L
L
L
4 dB
L
L
H
L
L
L
L
L
8 dB
L
H
L
L
L
L
L
L
16 dB
LHHHHHL
L
31 dB
Table 9. Serial Register Map
MSB (last in)
LSB (first in)
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
D7
D6
D5
D4
D3
D2
D1
D0
Attenuation Word
Bits must be set to logic low
Attenuation Word is derived directly from the attenuation value. For example, to program the 13 dB state:
Attenuation Word: Multiply by 4 and convert to binary → 4 *13 dB → 52 → 00110100
Serial Input: 00110100
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