SI8442BA-D-IS1 Datasheet, PDF(12/38 Page) Silicon image – LOW-POWER QUAD-CHANNEL DIGITAL ISOLATOR

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SI8442BA-D-IS1 Datasheet, PDF (12/38 Pages) Silicon image – LOW-POWER QUAD-CHANNEL DIGITAL ISOLATOR

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Si8440/41/42/45

Table 5. Electrical Characteristics1

(VDD1 = 2.70 V, VDD2 = 2.70 V, TA = â40 to 125 ÂºC; applies to narrow and wide-body SOIC packages)

Parameter

Symbol Test Condition

Min

Typ

Max Unit

High Level Input Voltage

Low Level Input Voltage

High Level Output Voltage

VIH

VIL

VOH

2.0

loh = â4 mA

VDD1,VDD2 â 0.

2.3

0.8

Low Level Output Voltage

VOL

lol = 4 mA

0.2

0.4

Input Leakage Current

Output Impedance2

Â±10

ÂµA

Enable Input High Current

IENH

VENx = VIH

2.0

ÂµA

Enable Input Low Current

IENL

VENx = VIL

2.0

ÂµA

DC Supply Current (All inputs 0 V or at supply)

Si8440Ax, Bx and Si8445Bx

VDD1

VDD2

VDD1

VDD2

All inputs 0 DC

All inputs 1 DC

1.5

2.3

2.5

3.8

5.7

8.6

2.6

3.9

Si8441Ax, Bx

VDD1

VDD2

VDD1

VDD2

All inputs 0 DC

All inputs 1 DC

1.8

2.7

2.5

3.8

4.9

7.4

3.6

5.4

Si8442Ax, Bx

VDD1

VDD2

VDD1

VDD2

All inputs 0 DC

All inputs 1 DC

2.3

3.5

2.3

3.5

4.5

6.8

4.5

6.8

1 Mbps Supply Current (All inputs = 500 kHz square wave, CI = 15 pF on all outputs)

Si8440Ax, Bx and Si8445Bx

VDD1

VDD2

3.6

5.4

3.0

3.9

Si8441Ax, Bx

VDD1

VDD2

3.5

5.3

3.4

5.1

Si8442Ax, Bx

VDD1

VDD2

3.6

5.4

3.6

5.4

1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is

constrained to TA = 0 to 85 Â°C.

2. The nominal output impedance of an isolator driver channel is approximately 85 ï, Â±40%, which is a combination of the

value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads

where transmission line effects will be a factor, output pins should be appropriately terminated with controlled

impedance PCB traces.

3. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at

the same supply voltages, load, and ambient temperature.

4. See "3. Errata and Design Migration Guidelines" on page 25 for more details.

5. Start-up time is the time period from the application of power to valid data at the output.

Rev. 1.5

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