EM342 Datasheet, PDF (93/143 Pages) Silicon Laboratories – High-Performance, Integrated RF4CE System-on-Chip

Bitname Bitfield Access
Description
SC_RXBEGB [13:0] RW DMA receive buffer B start address.
EM342
Register 8.22. SC1_RXENDA: Receive DMA End Address Register A
Bit
31
30
29
28
27
26
25
24
Name
0
0
1
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Name
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Name
0
0
SC_RXENDA
Bit
7
6
5
4
3
2
1
0
Name
SC_RXENDA
SC1_RXENDA: Address: 0x4000C804 Reset: 0x20000000
Bitname Bitfield Access
Description
SC_RXENDA [13:0] RW Address of the last byte that will be written in the DMA receive buffer A.
Rev 1.0
93