EM342 Datasheet, PDF (123/143 Pages) Silicon Laboratories – High-Performance, Integrated RF4CE System-on-Chip

EM342
Table 17.1. EM342 Pin Descriptions (Continued)
Pin #
19
Signal
PB3
Direction
I/O Digital I/O
Description
SC1nCTS
SC1SCLK
20
PB4
I
UART CTS handshake of Serial Controller 1
Enable with SC1_UARTCFG[5]
Select UART with SC1_MODE
I
SPI slave clock of Serial Controller 1
Enable slave with SC1_SPICFG[4]
Select SPI with SC1_MODE
I/O Digital I/O
SC1nRTS
SC1nSSEL
21
NC
O
UART RTS handshake of Serial Controller 1
Enable with SC1_UARTCFG[5]
Select UART with SC1_MODE
Select alternate output function with GPIO_PBCFGH[3:0]
I
SPI slave select of Serial Controller 1
Enable slave with SC1_SPICFG[4]
Select SPI with SC1_MODE
Do not connect
22
NC
Do not connect
23 VDD_PADS
Power Pads supply (2.1–3.6 V)
24
NC
25
NC
26
PA4
Do not connect
Do not connect
I/O Digital I/O
PTI_EN
TRACEDATA2
O
Frame signal of Packet Trace Interface (PTI)
Disable trace interface in ARM core
Enable PTI in Ember software
Select alternate output function with GPIO_PACFGH[3:0]
O
Synchronous CPU trace data bit 2
Select 4-wire synchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PACFGH[3:0]
Rev 1.0
123