EZR32HG320 Datasheet, PDF (77/87 Pages) Silicon Laboratories – Consumer electronics

EZR32HG320 Data Sheet
Pinout and Package
Alternate
LOCATION
Functionality
0
1
2
3
4
5
6
Description
US0_RX
PE11
PC10 PE12 PB8
USART0 Asynchronous Receive.
USART0 Synchronous mode Master Input /
Slave Output (MISO).
US0_TX
PE10
PE13 PB7
USART0 Asynchronous Transmit.Also used as
receive input in half duplex communication.
USART0 Synchronous mode Master Output /
Slave Input (MOSI).
USB_DM
PC14
USB D- pin.
USB_DMPU PA0
USB D- Pullup control.
USB_DP
PC15
USB D+ pin.
USB_VREGI USB_VREGI
USB Input to internal 3.3 V regulator
USB_VREGO
USB_VRE-
GO
USB Decoupling for internal 3.3 V USB regulator
and regulator output
USRF1_RX
PD6
USARTRF1 Asynchronous Receive.
USARTRF1 Synchronous mode Master Input /
Slave Output (MISO).
USRF1_TX
PD7
USARTRF1 Asynchronous Transmit.Also used
as receive input in half duplex communication.
USARTRF1 Synchronous mode Master Output /
Slave Input (MOSI).
5.4 GPIO Pinout Overview
The specific GPIO pins available in EZR32HG320 are shown in the GPIO pinout table. Each GPIO port is organized as 16-bit ports
indicated by letters A through F, and the individual pin on this port in indicated by a number from 15 down to 0.
Table 5.3. GPIO Pinout
Port
Port A
Port B
Port C
Port D
Port E
Port F
Pin Pin Pin Pin Pin Pin Pin 9 Pin 8 Pin 7 Pin 6 Pin 5 Pin 4 Pin 3 Pin 2 Pin 1 Pin 0
15 14 13 12 11 10
-
-
-
-
-
-
-
-
-
-
-
-
-
- PA1 PA0
- PB14 PB13 - PB11 -
- PB8 PB7 -
-
-
-
-
-
-
PC15 PC14 -
-
- PC10 PC9 PC8 -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- PD7 PD6 PD5 PD4 -
-
-
-
-
- PE13 PE12 PE11 PE10 -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- PF4 PF3 PF2 PF1 PF0
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