EFR32BG1V132F256 Datasheet, PDF (74/94 Pages) Silicon Laboratories – ConfidentialEFR32BG1 Blue Gecko Bluetooth® Smart SoC CSP Family

EFR32BG1 Blue Gecko Bluetooth® Smart SoC CSP Family Data Sheet
Pin Definitions
CSP Pin# and Name
Pin Alternate Functionality / Description
Confidential ^Pin
#
Pin Name
Analog
Timers
Communication
Radio
Other
D6
PC11
BUSAY
BUSBX
TIM0_CC0 #16
TIM0_CC1 #15
TIM0_CC2 #14
TIM0_CDTI0 #13
TIM0_CDTI1 #12
TIM0_CDTI2 #11
TIM1_CC0 #16
TIM1_CC1 #15
TIM1_CC2 #14
TIM1_CC3 #13 LE-
TIM0_OUT0 #16
LETIM0_OUT1 #15
PCNT0_S0IN #16
PCNT0_S1IN #15
US0_TX #16
US0_RX #15
US0_CLK #14
US0_CS #13
US0_CTS #12
US0_RTS #11
US1_TX #16
US1_RX #15
US1_CLK #14
US1_CS #13
US1_CTS #12
US1_RTS #11
LEU0_TX #16
LEU0_RX #15
I2C0_SDA #16
I2C0_SCL #15
FRC_DCLK #16
FRC_DOUT #15
FRC_DFRAME #14
MODEM_DCLK #16
MODEM_DIN #15
MODEM_DOUT #14
MODEM_ANT0 #13
MODEM_ANT1 #12
CMU_CLK0 #3
PRS_CH0 #13
PRS_CH9 #16
PRS_CH10 #5
PRS_CH11 #4
ACMP0_O #16
ACMP1_O #16
DBG_SWO #3
D7
RFVDD
Radio power supply
E1
PA0
ADC0_EXTN
BUSCX
BUSDY
TIM0_CC0 #0
TIM0_CC1 #31
TIM0_CC2 #30
TIM0_CDTI0 #29
TIM0_CDTI1 #28
TIM0_CDTI2 #27
TIM1_CC0 #0
TIM1_CC1 #31
TIM1_CC2 #30
TIM1_CC3 #29 LE-
TIM0_OUT0 #0 LE-
TIM0_OUT1 #31
PCNT0_S0IN #0
PCNT0_S1IN #31
US0_TX #0
US0_RX #31
US0_CLK #30
US0_CS #29
US0_CTS #28
US0_RTS #27
US1_TX #0
US1_RX #31
US1_CLK #30
US1_CS #29
US1_CTS #28
US1_RTS #27
LEU0_TX #0
LEU0_RX #31
I2C0_SDA #0
I2C0_SCL #31
FRC_DCLK #0
FRC_DOUT #31
FRC_DFRAME #30
MODEM_DCLK #0
MODEM_DIN #31
MODEM_DOUT #30
MODEM_ANT0 #29
MODEM_ANT1 #28
CMU_CLK1 #0
PRS_CH6 #0
PRS_CH7 #10
PRS_CH8 #9
PRS_CH9 #8
ACMP0_O #0
ACMP1_O #0
E2
VSS
Ground
E3
VSS
Ground
E4
VSS
Ground
E5
VSS
Ground
E6
VSS
Ground
E7 HFXTAL_N High Frequency Crystal input pin.
F1
VSS
Ground
F2 2G4RF_IOP 2.4 GHz Differential RF input/output, positive path.
F3 2G4RF_ION 2.4 GHz Differential RF input/output, negative path. This pin should be externally grounded.
F4
PAVSS
Power Amplifier (PA) voltage regulator VSS
F5
RFVSS
Radio Ground
F6
VSS
Ground
F7 HFXTAL_P High Frequency Crystal output pin.
G1
PAVDD
Power Amplifier (PA) voltage regulator VDD input
G7
RESETn
Reset input, active low.To apply an external reset source to this pin, it is required to only drive this pin low
during reset, and let the internal pull-up ensure that reset is released.
silabs.com | Smart. Connected. Energy-friendly.
Preliminary Rev. 1.1 | 73