SI7020-A10 Datasheet, PDF (6/34 Pages) Silicon Laboratories – Excellent long term stability

Si7020-A10
Table 3. I²C Interface Specifications¹
1.9  V_DD  3.6 V; T_A = –40 to +85 °C (G grade) or –40 to +125 °C (I/Y grade) unless otherwise noted.
Parameter
Symbol
Test Condition
Min
Typ
Max Unit
Hysteresis
V_HYS High-to-low versus low-to- 0.05 x V_DD —
—
V
high transition
SCLK Frequency²
SCL High Time
f_SCL
t_SKH
—
—
400 kHz
0.6
—
—
µs
SCL Low Time
t_SKL
1.3
—
—
µs
Start Hold Time
t_STH
0.6
—
—
µs
Start Setup Time
t_STS
Stop Setup Time
t_SPS
0.6
—
—
µs
0.6
—
—
µs
Bus Free Time
t_BUF
Between Stop and Start
1.3
—
—
µs
SDA Setup Time
t_DS
100
—
—
ns
SDA Hold Time
t_DH
100
SDA Valid Time
t_VD;DAT From SCL low to data valid
—
SDA Acknowledge Valid Time t_VD;ACK From SCL low to data valid
—
Suppressed Pulse Width³
t_SPS
50
—
—
ns
—
0.9
µs
—
0.9
µs
—
—
ns
Notes:
1. All values are referenced to V_IL and/or V_IH.
2. Depending on the conversion command, the Si7020 may hold the master during the conversion (clock stretch). At
above 100 kHz SCL, the Si7020 may also hold the master briefly for user register and device ID transactions. At the
highest I²C speed of 400 kHz the stretching will be <50 µs.
3. Pulses up to and including 50 ns will be suppressed.
SCL
tBUF
tSTH
1/fSCL
tSKH
tSP
tDS
tDH
tSKL
tSPS
SDA
Start Bit
D7
D6
D5
D0
R/W
ACK
Stop Bit
tSTS
t_VD : _ACK
Figure 1. I²C Interface Timing Diagram
6
Rev. 1.1