EFM32HG321 Datasheet, PDF (56/70 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

Preliminary
...the world's most energy friendly microcontrollers
Alternate
Functionality
0
TIM0_CC2
PA2
TIM0_CDTI0
TIM0_CDTI1
TIM0_CDTI2
TIM1_CC0
TIM1_CC1
PC14
TIM1_CC2
PC15
TIM2_CC0
PA8
TIM2_CC1
PA9
TIM2_CC2
PA10
US0_CLK
PE12
US0_CS
PE13
US0_RX
PE11
1
PA2
PC14
PC15
PE10
PE11
PE12
US0_TX
US1_CLK
US1_CS
US1_RX
PE10
PB7
PB8
PC1
US1_TX
PC0
USB_DM
USB_DMPU
USB_DP
USB_VREGI
USB_VREGO
PC14
PA0
PC15
USB_VREGI
USB_VREGO
LOCATION
2
3
4
PC1
PC2
PC3
PC4
PB7 PD6
PB8 PD7
PB11
PC8 PF2
PC9 PE12
PC10 PE13
PC9 PC15 PB13
PC8 PC14 PB14
PC10 PE12 PB8
PE13 PB7
PF0 PC15 PB11
PF1 PC14 PC14
PD6 PD6 PA0
PD7 PD7 PF2
5
6
Description
PF2 PF2 Timer 0 Capture Compare input / output channel 2.
PF3
Timer 0 Complimentary Deat Time Insertion channel 0.
PF4 PC14 Timer 0 Complimentary Deat Time Insertion channel 1.
PF5 PC15 Timer 0 Complimentary Deat Time Insertion channel 2.
Timer 1 Capture Compare input / output channel 0.
Timer 1 Capture Compare input / output channel 1.
Timer 1 Capture Compare input / output channel 2.
Timer 2 Capture Compare input / output channel 0.
Timer 2 Capture Compare input / output channel 1.
Timer 2 Capture Compare input / output channel 2.
PB13 PE12 USART0 clock input / output.
PB14 PE13 USART0 chip select input / output.
USART0 Asynchronous Receive.
PC1
PC1
USART0 Synchronous mode Master Input / Slave Output
(MISO).
USART0 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
PC0 PC0
USART0 Synchronous mode Master Output / Slave Input
(MOSI).
PC3
USART1 clock input / output.
PC0
USART1 chip select input / output.
USART1 Asynchronous Receive.
PC2
USART1 Synchronous mode Master Input / Slave Output
(MISO).
USART1 Asynchronous Transmit.Also used as receive in-
put in half duplex communication.
PC1
USART1 Synchronous mode Master Output / Slave Input
(MOSI).
USB D- pin.
USB D- Pullup control.
USB D+ pin.
USB Input to internal 3.3 V regulator
USB Decoupling for internal 3.3 V USB regulator and reg-
ulator output
4.3 GPIO Pinout Overview
The specific GPIO pins available in EFM32HG321 is shown in Table 4.3 (p. 57) . Each GPIO port is
organized as 16-bit ports indicated by letters A through F, and the individual pin on this port is indicated
by a number from 15 down to 0.
2015-05-06 - EFM32HG321FXX - _Rev0.91
56
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