EFM32HG321 Datasheet, PDF (54/70 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

QFP48 Pin#
and Name
Preliminary
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Pin Alternate Functionality / Description
Pin Name
Analog
Timers
Communication
Other
34
USB_VREGO
35
PC14
36
PC15
37
PF0
38
PF1
39
PF2
40
PF3
41
PF4
42
PF5
43
IOVDD_5
Digital IO power supply 5.
44
VSS
Ground.
45
PE10
46
PE11
47
PE12
ADC0_CH0
48
PE13
ADC0_CH1
TIM0_CDTI1 #1/6
TIM1_CC1 #0
PCNT0_S1IN #0
TIM0_CDTI2 #1/6
TIM1_CC2 #0
TIM0_CC0 #5
TIM0_CC1 #5
TIM0_CC2 #5/6
TIM2_CC0 #3
TIM0_CDTI0 #5
TIM0_CDTI1 #5
TIM0_CDTI2 #5
TIM1_CC0 #1
TIM1_CC1 #1
TIM1_CC2 #1
TIM2_CC1 #3
TIM2_CC2 #3
US0_CS #3
US1_CS #3/4
LEU0_TX #5
USB_DM
US0_CLK #3
US1_CLK #3
LEU0_RX #5
USB_DP
US1_CLK #2
LEU0_TX #3
I2C0_SDA #5
US1_CS #2
LEU0_RX #3
I2C0_SCL #5
US1_TX #4
LEU0_TX #4
US0_TX #0
US0_RX #0
US0_RX #3
US0_CLK #0/6
I2C0_SDA #6
US0_TX #3
US0_CS #0/6
I2C0_SCL #6
PRS_CH0 #2
PRS_CH1 #2
DBG_SWCLK #0
BOOT_TX
DBG_SWDIO #0
GPIO_EM4WU3
BOOT_RX
CMU_CLK0 #3
PRS_CH0 #3
GPIO_EM4WU4
PRS_CH0 #1
PRS_CH1 #1
PRS_CH2 #1
PRS_CH2 #2
PRS_CH3 #2
CMU_CLK1 #2
PRS_CH1 #3
ACMP0_O #0
PRS_CH2 #3
GPIO_EM4WU5
4.2 Alternate Functionality Pinout
A wide selection of alternate functionality is available for multiplexing to various pins. This is shown in
Table 4.2 (p. 54) . The table shows the name of the alternate functionality in the first column, followed
by columns showing the possible LOCATION bitfield settings.
Note
Some functionality, such as analog interfaces, do not have alternate settings or a LOCA-
TION bitfield. In these cases, the pinout is shown in the column corresponding to LOCA-
TION 0.
Table 4.2. Alternate functionality overview
Alternate
LOCATION
Functionality
0
1
2
3
4
ACMP0_CH0
PC0
ACMP0_CH1
PC1
ACMP0_CH2
PC2
ACMP0_CH3
PC3
5
6
Description
Analog comparator ACMP0, channel 0.
Analog comparator ACMP0, channel 1.
Analog comparator ACMP0, channel 2.
Analog comparator ACMP0, channel 3.
2015-05-06 - EFM32HG321FXX - _Rev0.91
54
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