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SI8460 Datasheet, PDF (5/36 Pages) Silicon Laboratories – LOW POWER SIX-CHANNEL DIGITAL ISOLATOR
Si8460/61/62/63
Table 3. Electrical Characteristics
(VDD1 = 5 V±10%, VDD2 = 5 V±10%, TA = –40 to 125 °C; applies to narrow-body SOIC package)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
High Level Input Voltage
VIH
2.0
—
—
V
Low Level Input Voltage
VIL
—
—
0.8
V
High Level Output Voltage
VOH
loh = –4 mA
VDD1,VDD2 – 0.4
4.8
—
V
Low Level Output Voltage
VOL
lol = 4 mA
—
0.2
0.4
V
Input Leakage Current
IL
—
—
±10
µA
Output Impedance1
ZO
—
85
DC Supply Current (All inputs 0 V or at Supply)
—

d Si8460Ax, Bx
e VDD1
VDD2
d VDD1
n VDD2
All inputs 0 DC
—
All inputs 0 DC
—
All inputs 1 DC
—
All inputs 1 DC
—
1.7
2.6
3.3
5.0
mA
7.7
11.6
3.5
5.3
s Si8461Ax, Bx
e n VDD1
m ig VDD2
VDD1
VDD2
All inputs 0 DC
—
All inputs 0 DC
—
All inputs 1 DC
—
All inputs 1 DC
—
2.1
3.2
3.4
5.1
mA
7.1
10.7
4.5
6.8
m s Si8462Ax, Bx
o e VDD1
VDD2
c D VDD1
VDD2
All inputs 0 DC
—
All inputs 0 DC
—
All inputs 1 DC
—
All inputs 1 DC
—
2.5
3.8
3.0
4.5
mA
6.5
9.8
5.0
8.3
e Si8463Ax, Bx
w VDD1
R e VDD2
t VDD1
o N VDD2
All inputs 0 DC
—
All inputs 0 DC
—
All inputs 1 DC
—
All inputs 1 DC
—
2.8
4.2
2.8
4.2
mA
6.0
9.0
6.0
9.0
Notes:
N r 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
fo where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.5
5