SI8460 Datasheet, PDF (11/36 Pages) Silicon Laboratories – LOW POWER SIX-CHANNEL DIGITAL ISOLATOR

Si8460/61/62/63
Table 4. Electrical Characteristics (Continued)
(V_DD1 = 3.3 V±10%, V_DD2 = 3.3 V±10%, T_A = –40 to 125 °C; applies to narrow-body SOIC package)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)
Si8460Bx
V_DD1
V_DD2
—
4.8
7.2
mA
—
20
25
Si8461Bx
V_DD1
—
7.4
9.3
mA
V_DD2
Si8462Bx
d ^V_DD1
V_DD2
e _Si8463Bx
d V_DD1
V_DD2
en _{ns Si846xAx}
Maximum Data Rate
m _{ig Minimum Pulse Width}
m ^{s Propagation Delay}
o ^{e Pulse Width Distortion}
|t_PLH - t_PHL|
c ^{D Propagation Delay Skew2}
Channel-Channel Skew
e _Si846xBx
R ^w Maximum Data Rate
e _{Minimum Pulse Width}
ot ^{N Propagation Delay}
Pulse Width Distortion
N ^{r |tPLH - tPHL|}
fo ^{Propagation Delay Skew2}
—
—
—
—
—
Timing Characteristics
0
—
t_PHL,t_PLH See Figure 1
—
PWD
See Figure 1
—
t_PSK(P-P)
—
t_PSK
—
0
—
t_PHL, t_PLH See Figure 1
3.0
PWD
See Figure 1
—
t_PSK(P-P)
—
17.7
10.2
15
12.7
12.7
—
—
—
—
—
—
—
—
6.0
1.5
2.0
22.1
12.8
18.8
15.9
15.9
1.0
250
35
25
40
35
150
6.0
9.5
2.5
3.0
mA
mA
Mbps
ns
ns
ns
ns
ns
Mbps
ns
ns
ns
ns
Channel-Channel Skew
t_PSK
—
0.5
1.8
ns
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. t_PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.5
11