SI52131-A11A Datasheet, PDF (5/19 Pages) Silicon Laboratories – No termination resistors required

Si52131-A11A
Table 2. AC Electrical Specifications
Parameter
Symbol
Test Condition
Min
Crystal
Long-term Accuracy
Clock Input
L_ACC
Measured at V_DD/2 differential
—
CLKIN Duty Cycle
CLKIN Rise/Fall Slew Rate
CLKIN Cycle to Cycle Jitter
CLKIN Long Term Jitter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
DIFF at 0.7 V
T_DC
T_R/T_F
T_CCJ
T_LTJ
V_IH
V_IL
I_IH
I_IL
Measured at V_DD/2
47
Measured between 0.2 V_DD and 0.5
0.8 V_DD
Measured at VDD/2
—
Measured at VDD/2
—
XIN/CLKIN pin
2
XIN/CLKIN pin
—
XIN/CLKIN pin, VIN = VDD
—
XIN/CLKIN pin, 0 < VIN <0.8 –35
Duty Cycle
Cycle to Cycle Jitter
PCIe Gen 1 Pk-Pk Jitter
T_DC
Measured at 0 V differential
45
T_CCJ
Measured at 0 V differential
—
Pk-Pk
PCIe Gen 1
0
PCIe Gen 2 Phase Jitter
RMS_GEN2
10 kHz < F < 1.5 MHz
0
1.5 MHz < F < Nyquist
0
PCIe Gen 3 Phase Jitter
RMS_GEN3 Includes PLL BW 2–4 MHz,
0
CDR = 10 MHz
Long Term Accuracy
Rise/Fall Slew Rate
L_ACC
Measured at 0 V differential
—
T_R/T_F
Measured differentially from
1
±150 mV
Voltage High
Voltage Low
Crossing Point Voltage at 0.7 V
Swing
V_HIGH
V_LOW
V_OX
—
–0.3
300
Spread Range
SPR-2
Down spread
—
Modulation Frequency
F_MOD
30
REF at 3.3 V
Duty Cycle
Rise/Fall Slew Rate
Cycle to Cycle Jitter
Long Term Accuracy
Enable/Disable and Setup
T_DC
Measurement at 1.5 V
45
T_R / T_F Measured between 0.8 and 2.0 V 1.0
T_CCJ
Measurement at 1.5 V
—
L_ACC
Measured at 1.5 V
—
Clock Stabilization from Power-up T_STABLE
Stopclock Setup Time
T_SS
Note: Visit www.pcisig.com for complete PCIe specifications.
—
10.0
Typ Max Unit
—
250 ppm
—
53
%
—
4.0 V/ns
—
250 ps
—
350 ps
— VDD+0.3 V
—
0.8
V
—
35
µA
—
—
µA
—
55
%
35
50
ps
40
86
ps
2
3.0
ps
2
3.1
ps
0.5
1.0
ps
—
100 ppm
—
8 V/ns
—
1.15 V
—
—
V
—
550 mV
–0.5
—
%
31.5
33 kHz
—
55
%
—
4.0 V/ns
—
300 ps
—
100 ppm
—
1.8 ms
—
—
ns
Rev 1.0
5