SI52131-A11A Datasheet, PDF (11/19 Pages) Silicon Laboratories – No termination resistors required

Si52131-A11A
4. Control Registers
4.1. I²C Interface
To enhance the flexibility and function of the clock synthesizer, an I²C interface is provided. One can control
various functions through the I²C interface, such as individual enabling or disabling of the clock output buffers. The
registers associated with the I²C interface initialize to their default setting at power-up. The use of this interface is
optional. Clock device register changes are normally made at system initialization, if any are required.
4.2. Data Protocol
The I²C protocol accepts byte write, byte read, block write, and block read operations from the controller. For block
write/read operation, access the bytes in sequential order from lowest to highest (most significant bit first) with the
ability to stop after any complete byte is transferred. For byte write and byte read operations, the system controller
can access individually indexed bytes.
The block write and block read protocol is outlined in Table 6 while Table 7 outlines byte write and byte read
protocol. The slave receiver address is 11010110 (D6h).
Bit
1
8:2
9
10
18:11
19
27:20
28
36:29
37
45:38
46
....
....
....
....
Table 6. Block Read and Block Write Protocol
Block Write Protocol
Description
Block Read Protocol
Bit
Description
Start
1 Start
Slave address–7 bits
8:2 Slave address–7 bits
Write
9 Write
Acknowledge from slave
10 Acknowledge from slave
Command Code–8 bits
18:11 Command Code–8 bits
Acknowledge from slave
19 Acknowledge from slave
Byte Count–8 bits
20 Repeat start
Acknowledge from slave
27:21 Slave address–7 bits
Data byte 1–8 bits
28 Read = 1
Acknowledge from slave
29 Acknowledge from slave
Data byte 2–8 bits
37:30 Byte Count from slave–8 bits
Acknowledge from slave
38 Acknowledge
Data Byte /Slave Acknowledges
46:39 Data byte 1 from slave–8 bits
Data Byte N–8 bits
47 Acknowledge
Acknowledge from slave
55:48 Data byte 2 from slave–8 bits
Stop
56 Acknowledge
.... Data bytes from slave/Acknowledge
.... Data Byte N from slave–8 bits
.... NOT Acknowledge
.... Stop
Rev 1.0
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