EFM32TG230 Datasheet, PDF (47/68 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

QFN64 Pin#
and Name
Pin Name
Analog
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Pin Alternate Functionality / Description
Timers
Communication
Other
30
PD2
ADC0_CH2
TIM0_CC1 #3
US1_CLK #1
31
PD3
ADC0_CH3
OPAMP_N2
TIM0_CC2 #3
US1_CS #1
32
PD4
ADC0_CH4
OPAMP_P2
LEU0_TX #0
33
PD5
ADC0_CH5
OPAMP_OUT2 #0
LEU0_RX #0
34
PD6
ADC0_CH6
DAC0_P1 /
OPAMP_P1
TIM1_CC0 #4
LETIM0_OUT0 #0
PCNT0_S0IN #3
US1_RX #2
I2C0_SDA #1
LES_ALTEX0 #0
ACMP0_O #2
35
PD7
ADC0_CH7
DAC0_N1 /
OPAMP_N1
TIM1_CC1 #4
LETIM0_OUT1 #0
PCNT0_S1IN #3
US1_TX #2
I2C0_SCL #1
CMU_CLK0 #2
LES_ALTEX1 #0
ACMP1_O #2
36
PD8
CMU_CLK1 #1
37
PC6
ACMP0_CH6
I2C0_SDA #2
LES_CH6 #0
38
PC7
ACMP0_CH7
I2C0_SCL #2
LES_CH7 #0
39
VDD_DREG
Power supply for on-chip voltage regulator.
40
DECOUPLE
Decouple output for on-chip voltage regulator. An external capacitance of size C_DECOUPLE is required at this pin.
41
PC8
ACMP1_CH0
US0_CS #2
LES_CH8 #0
42
PC9
ACMP1_CH1
US0_CLK #2
LES_CH9 #0
GPIO_EM4WU2
43
PC10
ACMP1_CH2
US0_RX #2
LES_CH10 #0
44
PC11
ACMP1_CH3
US0_TX #2
LES_CH11 #0
45
PC12
ACMP1_CH4
DAC0_OUT1ALT #0/
OPAMP_OUT1ALT
CMU_CLK0 #1
LES_CH12 #0
46
PC13
ACMP1_CH5
DAC0_OUT1ALT #1/
OPAMP_OUT1ALT
TIM1_CC0 #0
TIM1_CC2 #4
PCNT0_S0IN #0
LES_CH13 #0
47
PC14
ACMP1_CH6
DAC0_OUT1ALT #2/
OPAMP_OUT1ALT
TIM1_CC1 #0
PCNT0_S1IN #0
US0_CS #3
LES_CH14 #0
48
PC15
ACMP1_CH7
DAC0_OUT1ALT #3/
OPAMP_OUT1ALT
TIM1_CC2 #0
US0_CLK #3
LES_CH15 #0
DBG_SWO #1
49
PF0
TIM0_CC0 #5
LETIM0_OUT0 #2
US1_CLK #2
LEU0_TX #3
I2C0_SDA #5
DBG_SWCLK #0/1
50
PF1
TIM0_CC1 #5
LETIM0_OUT1 #2
US1_CS #2
LEU0_RX #3
I2C0_SCL #5
DBG_SWDIO #0/1
GPIO_EM4WU3
51
PF2
TIM0_CC2 #5
LEU0_TX #4
ACMP1_O #0
DBG_SWO #0
GPIO_EM4WU4
52
PF3
PRS_CH0 #1
53
PF4
PRS_CH1 #1
54
PF5
PRS_CH2 #1
55
IOVDD_5
Digital IO power supply 5.
56
PE8
PRS_CH3 #1
57
PE9
2015-03-06 - EFM32TG230FXX - d0030_Rev1.40
47
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