EFM32TG230 Datasheet, PDF (46/68 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

QFN64 Pin#
and Name
Pin Name
Analog
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Pin Alternate Functionality / Description
Timers
Communication
Other
3
PA2
TIM0_CC2 #0/1
CMU_CLK0 #0
4
PA3
LES_ALTEX2 #0
5
PA4
LES_ALTEX3 #0
6
PA5
LES_ALTEX4 #0
7
PA6
GPIO_EM4WU1
8
IOVDD_0
Digital IO power supply 0.
9
PC0
ACMP0_CH0
DAC0_OUT0ALT #0/
OPAMP_OUT0ALT
TIM0_CC1 #4
PCNT0_S0IN #2
US0_TX #5
US1_TX #0
I2C0_SDA #4
LES_CH0 #0
PRS_CH2 #0
10
PC1
ACMP0_CH1
DAC0_OUT0ALT #1/
OPAMP_OUT0ALT
TIM0_CC2 #4
PCNT0_S1IN #2
US0_RX #5
US1_RX #0
I2C0_SCL #4
LES_CH1 #0
PRS_CH3 #0
11
PC2
ACMP0_CH2
DAC0_OUT0ALT #2/
OPAMP_OUT0ALT
LES_CH2 #0
12
PC3
ACMP0_CH3
DAC0_OUT0ALT #3/
OPAMP_OUT0ALT
LES_CH3 #0
13
PC4
ACMP0_CH4
DAC0_P0 /
OPAMP_P0
LETIM0_OUT0 #3
LES_CH4 #0
14
PC5
ACMP0_CH5
DAC0_N0 /
OPAMP_N0
LETIM0_OUT1 #3
LES_CH5 #0
15
PB7
LFXTAL_P
TIM1_CC0 #3
US0_TX #4
US1_CLK #0
16
PB8
LFXTAL_N
TIM1_CC1 #3
US0_RX #4
US1_CS #0
17
PA8
18
PA9
19
PA10
Reset input, active low.
20
RESETn
To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up
ensure that reset is released.
21
PB11
DAC0_OUT0 /
OPAMP_OUT0
TIM1_CC2 #3
LETIM0_OUT0 #1
22
PB12
DAC0_OUT1 /
OPAMP_OUT1
LETIM0_OUT1 #1
23
AVDD_1
Analog power supply 1.
24
PB13
HFXTAL_P
US0_CLK #4/5
LEU0_TX #1
25
PB14
HFXTAL_N
US0_CS #4/5
LEU0_RX #1
26
IOVDD_3
Digital IO power supply 3.
27
AVDD_0
Analog power supply 0.
28
PD0
ADC0_CH0
DAC0_OUT0ALT #4/
OPAMP_OUT0ALT
OPAMP_OUT2 #1
US1_TX #1
29
PD1
ADC0_CH1
DAC0_OUT1ALT #4/
OPAMP_OUT1ALT
TIM0_CC0 #3
US1_RX #1
2015-03-06 - EFM32TG230FXX - d0030_Rev1.40
46
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