EFM32TG225 Datasheet, PDF (47/66 Pages) Silicon Laboratories – Configurable peripheral I/O locations

BGA48 Pin#
and Name
...the world's most energy friendly microcontrollers
Pin Alternate Functionality / Description
Pin Name
Analog
Timers
Communication
Other
OPAMP_P0
E3
PA8
E4
VDD_DREG
Power supply for on-chip voltage regulator.
E5
AVSS_0
Analog ground 0.
E6
PD7
ADC0_CH7
DAC0_N1 /
OPAMP_N1
TIM1_CC1 #4
LETIM0_OUT1 #0
PCNT0_S1IN #3
US1_TX #2
I2C0_SCL #1
CMU_CLK0 #2
LES_ALTEX1 #0
ACMP1_O #2
E7
PD6
ADC0_CH6
DAC0_P1 /
OPAMP_P1
TIM1_CC0 #4
LETIM0_OUT0 #0
PCNT0_S0IN #3
US1_RX #2
I2C0_SDA #1
LES_ALTEX0 #0
ACMP0_O #2
F1
PB7
LFXTAL_P
TIM1_CC0 #3
US0_TX #4
US1_CLK #0
F2
PA9
Reset input, active low.
F3
RESETn
To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up
ensure that reset is released.
F4
IOVDD_3
Digital IO power supply 3.
F5
AVDD_1
Analog power supply 1.
F6
AVDD_0
Analog power supply 0.
F7
PD5
ADC0_CH5
OPAMP_OUT2 #0
LEU0_RX #0
G1
PB8
LFXTAL_N
TIM1_CC1 #3
US0_RX #4
US1_CS #0
G2
PA10
G3
PB11
DAC0_OUT0 /
OPAMP_OUT0
TIM1_CC2 #3
LETIM0_OUT0 #1
G4
AVSS_1
Analog ground 1.
G5
PB13
HFXTAL_P
US0_CLK #4/5
LEU0_TX #1
G6
PB14
HFXTAL_N
US0_CS #4/5
LEU0_RX #1
G7
PD4
ADC0_CH4
OPAMP_P2
LEU0_TX #0
4.2 Alternate Functionality Pinout
A wide selection of alternate functionality is available for multiplexing to various pins. This is shown in
Table 4.2 (p. 48) . The table shows the name of the alternate functionality in the first column, followed
by columns showing the possible LOCATION bitfield settings.
Note
Some functionality, such as analog interfaces, do not have alternate settings or a LOCA-
TION bitfield. In these cases, the pinout is shown in the column corresponding to LOCA-
TION 0.
2015-03-06 - EFM32TG225FXX - d0205_Rev1.40
47
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